MC33593FTA Просмотр технического описания (PDF) - Motorola => Freescale

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MC33593FTA

PLL Tuned UHF Receiver / LQFP24

Motorola => Freescale 

Freescale SMeCm33ic59o3nductor, Inc.

STATE MACHINE WITH STROBE OSCILLATOR CONTROL

Figure 15 details the state machine when the strobe oscillator is enabled (SOE=1).

Figure 15: State machine with strobe oscillator control

State 2

Sleep mode

Reset and Start Strobe Counter

SPI master

Strobe Counter=SR

Strobe Counter ≠ SR

OR STROBE=1 AND STROBE pin released

State 3

Run mode

Waiting for ID word

ID detected

AND HE=1

ID detected

AND HE=0

Time-out

State 4

Run mode

Reset and start Timer

Waiting for Header

Header received

State 5

Run mode

Output data & clock

Waiting for End of Message

EOM received

State 2:

The circuit is in Sleep mode, except for the Strobe oscillator and the Strobe counter.

State 3:

The circuit is waiting for a valid ID word. If ID or its complement is detected, the state machine advances to state

4. If not, it will go back into sleep mode (state 2) at the end of the Strobe period.

State 4:

ID or its complement has been detected, Data Manager is waiting for Header or its complement. Time-out

counter is running. This counter will count up to 66 (± 1) times the strobe oscillator period (TStrobe).

State 5:

If Header has been received, data and clock signals are output on the SPI port until End of Message indicates the

data sequence end. If the complement of Header has been received, output data are complemented too.

For all states:

At any time, a low level applied on RESETB during more than one Ts forces the state machine to state 1. When

the transition condition from one state to the next one is fulfilled, the transition time is one Ts (except for reaching

state 2). The transition time to state 2 is 2 × Ts (+ duration of the dummy byte if it is shifted out, only for transition

coming from state 5).

© Motorola, Inc., 2002.

FMorOTMOoRrOeLIAnSfoErMmICaOtNioDnUCOTnORTShPisROPDroUdCuTSct,

Go to: www14.freescale.com

revision 7.0, 5 February 2002

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