MCM69R820C Просмотр технического описания (PDF) - Motorola => Freescale

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Компоненты Описание

производитель

MCM69R820C

4M Late Write 2.5 V I/O

Motorola => Freescale 

Freescale Semiconductor, Inc.

MCM69R738C PIN DESCRIPTIONS

PBGA Pin Locations

4K

4L

(a) 6K, 7K, 6L, 7L, 6M, 6N, 7N, 6P, 7P

(b) 6D, 7D, 6E, 7E, 6F, 6G, 7G, 6H, 7H

(c) 1D, 2D, 1E, 2E, 2F, 1G, 2G, 1H, 2H

(d) 1K, 2K, 1L, 2L, 2M, 1N, 2N, 1P, 2P

4F

2A, 3A, 5A, 6A, 3B, 5B, 2C, 3C, 5C, 6C,

4N, 4P, 2R, 6R, 3T, 4T, 5T

5L, 5G, 3G, 3L

(a), (b), (c), (d)

Symbol

CK

CK

DQx

G

SA

SBx

4E

SS

4M

SW

4U

3U

5U

2U

7T

4C, 2J, 4J, 6J, 4R, 5R

1A, 7A, 1F, 7F, 1J, 7J, 1M, 7M, 1U, 7U

3D, 5D, 3E, 5E, 3F, 5F, 3H, 5H, 3K, 5K,

3M, 5M, 3N, 5N, 3P, 5P, 3R

4A, 1B, 2B, 4B, 6B, 7B, 1C, 7C, 4D, 4G,

4H, 3J, 5J, 1R, 7R, 1T, 2T, 6T, 6U

TCK

TDI

TDO

TMS

ZZ

VDD

VDDQ

VSS

NC

Type

Input

Input

I/O

Description

Address, data in, and control input register clock. Active high.

Address, data in, and control input register clock. Active low.

Synchronous Data I/O.

Input

Input

Output Enable: Asynchronous pin, active low.

Synchronous Address Inputs: Registered on the rising clock edge.

Input

Input

Input

Input

Input

Output

Input

Input

Supply

Supply

Supply

Synchronous Byte Write Enable: Enables writes to byte x in

conjunction with the SW input. Has no effect on read cycles, active

low.

Synchronous Chip Enable: Registered on the rising clock edge,

active low.

Synchronous Write: Registered on the rising clock edge, active low.

Writes all enabled bytes.

Test Clock (JTAG).

Test Data In (JTAG).

Test Data Out (JTAG).

Test Mode Select (JTAG).

Enables sleep mode, active high.

Core Power Supply.

Output Power Supply: Provides operating power for output buffers.

Ground.

—

No Connection: There is no connection to the chip.

Note: 3J and 5J are tied common.

MOTOROLA FAST SRAM

For More Information On This Product, MCM69R738C•MCM69R820C

Go to: www.freescale.com

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