NB100LVEP91(2003) Просмотр технического описания (PDF) - ON Semiconductor
Номер в каталоге
Компоненты Описание
производитель
NB100LVEP91
(Rev.:2003)
(Rev.:2003)
ON Semiconductor
NB100LVEP91 Datasheet PDF : 8 Pages
| |||
NB100LVEP91
Application Information
All NB100LVEP91 inputs can accept LVPECL, LVTTL,
LVCMOS, HSTL, CML, or LVDS signal levels. The
limitations for differential input signal (LVDS, HSTL,
LVPECL, or CML) are the minimum input swing of 150 mV
VCC
VCC
and the maximum input swing of 3.0 V. Within these
conditions, the input voltage can range from VCC to GND.
Examples interfaces are illustrated below in a 50 W
environment (Z = 50 W)
VCC
VCC
LVPECL
Driver
Z
D
LVPECL91
Z
D
50 W 50 W
GND
VTT = VCC - 2.0 V
GND VEE
Figure 5. Standard LVPECL Interface
VCC
VCC
HSTL
Driver
Z
D
LVPECL91
Z
D
50 W 50 W
GND
GND VEE
GND
Figure 7. Standard HSTL Interface
VCC
VCC
LVDS
Driver
Z
100 W
Z
D
LVPECL91
D
GND
GND VEE
Figure 6. Standard LVDS Interface
VCC
VCC
VCC
CML
Driver
50 W 50 W
Z
D
LVPECL91
Z
D
GND
GND VEE
Figure 8. Standard 50 W Load CML Interface
VCC
VCC
LVTTL
Driver
Z
D
LVPECL91
1.5 V
D
(Reference Voltage)
LVCMOS
Driver
Z
Open
D
LVPECL91
D
GND
GND VEE
Figure 9. Standard LVTTTL Interface
GND
GND VEE
Figure 10. Standard LVCMOS Interface
(D will default to VCC/2 when left open. A
reference voltage of VCC/2 should be applied to
D input, if D is interfaced to CMOS signals.)
http://onsemi.com
5
Share Link: 