NCP1351 Просмотр технического описания (PDF) - ON Semiconductor

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производитель

NCP1351

Variable Off Time PWM Controller

ON Semiconductor 

Ct

Ct

270p VCC

VCC

ICt

10m

Reset

NCP1351

FB

IFB

C1

R1

DFB

100n

2.5k

IFB

IFB

Voffset

500mV

+

RFB

45k

−

Clock

+

VCC

C3

22pF

CS

Roffset

3.9k

ICSmin

Idiff

Idiff = ICSmax − ICSmin

Idiff

f(IFB)

to Rsense

Figure 13. The Feedback Section Inside the NCP1351

The FB pin can actually be seen as a diode, forward biased

by the optocoupler current. The feedback current, IFB on

Figure 13, enter an internal 45 kW resistor which develops

a voltage. This voltage becomes the variable threshold point

for the capacitor charge, as indicated by Figure 8. Thus, in

lack of feedback current (start−up or short−circuit), there is

no voltage across the 45 kW and the series offset of 500 mV

clamps the capacitor swing. If a 270 pF capacitor is used, the

maximum switching frequency is 65 kHz.

Folding the frequency back at a rather high peak current

can obviously generate audible noise. For this reason, the

NCP1351 uses a patented current compression technique

which reduces the peak current in lighter load conditions. By

design, the peak current changes from 100% of its full load

value, to 30% of this value in light load conditions. This is

the block placed on the lower left corner of Figure 13. In full

load conditions, the feedback current is weak and all the

current flowing through the external offset resistor is:

ICS + ICS_min ) Idif + ICS_max * ICS_min

+ ICS_max

(eq. 12)

As the load goes lighter, the feedback current increases and

starts to steal current away from the generators. Equation 12

can thus be updated by:

ICS + ICS_max * kIFB

(eq. 13)

Equation 13 testifies for the current reduction on the offset

generator, k represents an internal coefficient. When the

feedback current equals Idif, the offset becomes:

ICS + ICS_min

(eq. 14)

http://onsemi.com

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