NXP Semiconductors
PCA9545A/45B/45C
4-channel I2C-bus switch with interrupt logic and reset
6.4 Power-on reset
When power is applied to VDD, an internal Power-On Reset (POR) holds the
PCA9545A/45B/45C in a reset condition until VDD has reached VPOR. At this point, the
reset condition is released and the PCA9545A/45B/45C registers and I2C-bus state
machine are initialized to their default states (all zeroes) causing all the channels to be
deselected. Thereafter, VDD must be lowered below 0.2 V for at least 5 s in order to reset
the device.
6.5 Voltage translation
The pass gate transistors of the PCA9545A/45B/45C are constructed such that the VDD
voltage can be used to limit the maximum voltage that is passed from one I2C-bus to
another.
5.0
Vo(sw)
(V)
4.0
3.0
2.0
002aaa964
(1)
(2)
(3)
1.0
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VDD (V)
(1) maximum
(2) typical
(3) minimum
Fig 9. Pass gate voltage versus supply voltage
Figure 9 shows the voltage characteristics of the pass gate transistors (note that the graph
was generated using the data specified in Section 11 “Static characteristics” of this data
sheet). In order for the PCA9545A/45B/45C to act as a voltage translator, the Vo(sw)
voltage should be equal to, or lower than the lowest bus voltage. For example, if the main
bus was running at 5 V, and the downstream buses were 3.3 V and 2.7 V, then Vo(sw)
should be equal to or below 2.7 V to clamp the downstream bus voltages effectively.
Looking at Figure 9, we see that Vo(sw)(max) is at 2.7 V when the PCA9545A/45B/45C
supply voltage is 3.5 V or lower, so the PCA9545A/45B/45C supply voltage could be set to
3.3 V. Pull-up resistors can then be used to bring the bus voltages to their appropriate
levels (see Figure 16).
More Information can be found in Application Note AN262: PCA954X family of I2C/SMBus
multiplexers and switches.
PCA9545A_45B_45C
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 5 May 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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