SAB80535 Просмотр технического описания (PDF) - Siemens AG

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SAB80535

8 Bit Single-Chip Microcontroller

Siemens AG 

SAB 80515/80535

Functional Description

The architecture of the SAB 80515 is based on the SAB 8051 microcontroller family. The fol-

lowing features of the SAB 80515 are fully compatible with the SAB 8051 features:

– Instruction set

– External memory expansion interface (port 0 and port 2)

– Full-duplex serial port

– Timer/counter 0 and 1

– Alternate functions on port 3

– The lower 128 bytes of internal RAM and the lower 4 Kbytes of internal ROM

The SAB 80515 additionally contains 128 bytes of internal RAM and 4 Kbytes of internal ROM,

which results in a total of 256 bytes of RAM and 8 Kbytes of ROM on chip. The

SAB 80515 has a new 16-bit timer/counter with a 2:1 prescaler, reload mode, compare and

capture capability. It also contains a 16-bit watchdog timer, an 8-bit A/D converter with pro-

grammable reference voltages, two additional quasi-bidirectional 8-bit ports, one 8-bit input

port for analog signals, and a programmable clock output (fOSC/12).

Furthermore, the SAB 80515 has a powerful interrupt structure with 12 vectors and 4 program-

mable priority levels.

Figure 1 shows a block diagram of the SAB 80515.

CPU

The SAB 80515 is efficient both as a controller and as an arithmetic processor. It has extensive

facilities for binary and BCD arithmetic and excels in its bit-handling capabilities. Efficient use

of program memory results from an instruction set consisting of 44% one-byte, 41% two-byte,

and 15% three-byte instructions. With a 12 MHz crystal, 58% of the instructions execute in

1.0 µs.

Memory Organization

The SAB 80515 manipulates operands in the four memory address spaces described in the fol-

lowing. (Figure 2 illustrates the memory address spaces of the SAB 80515).

Semiconductor Group

11

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