ST8016
16 REVISION
REVISION
0.14
0.143
0.152
0.153
0.16
0.17
0.2
0.23
0.24
0.30
0.31
0.32
0.33
0.34
0.35
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
DESCRIPTION
Page1, modify pin configuration
Application circuit
Pad allocation, Bump size
change pad name V5 as Vss
add pad 203 gold bump data
add some bump information
correct pad name
update TCP(F18) information
correct all V5 as Vss
AC/DC data revise
correct segment mode MD=L/H=4/8 bit (section 7.2.2)
gold bump strength=30g
Dual mode describe correct and COG application circuit (section
12.2)
Correct some wrong word mistake
add Input/Output circuit
tSL MIN change to 51 , and change parameter name
Correct AC characteristics column
Change operating temperature from -20°C~85°C to -25°C~85°C
Modify V5 to Vss in Pad Diagram Table , and DI7 pin description for
com mode
Modify AC Characteristics
Add alignment mark
Add max value for input high voltage
Modify chip size and thickness with scribe line
Modify Wafer Thickness
Add PCB layout notice: resistance limitation between Vdd and GND
Modify all the data about absolute max voltage and recommend max
voltage
Add application note
PAGE
25
23
2,16
27
DATE
2000/05/16
2000/07/25
2000/08/01
2000/08/09
2000/08/17
2000/10/09
2000/11/02
2000/12/04
2000/12/19
2000/12/26
2001/02/08
2001/03/01
2001/05/22
2001/06/11
2001/08/29
2001/09/28
2001/10/04
2002/06/07
2005/01/31
2005/09/23
2005/10/19
2006/09/04
2006/10/26
2006/12/22
2007/2/6
2007/5/25
2008/05/07
The above information is the exclusive intellectual property of Sitronix Technology Corp. and shall not be disclosed, distributed or reproduced without
permission from Sitronix.
Ver 2.0
Page 28/28
2008/05/07