U6812B
Application Note
Digital Inputs (DIS, IN 1,
IN 2, IN 3 and TxD)
It is recommended to use the external components as shown in Figure 3 on page 3 with
the reverse battery protection diode D1 and the buffer capacitor C1 = 10 µF.
The digital inputs are CMOS-compatible and equipped with a built-in pull-up resistor
with a typical rating of 85 kW to VCC. The input threshold totals VTH = 0.57 ´ VCC with a
typical hysteresis of 100 mV. The inputs are designed for an input voltage of -0.2 V to
VCC + 0.6 V.
For proper activation of the output stages, it is mandatory that the inputs are kept low as
long as the supply voltage is not applied. When the supply voltage has been applied, all
inputs need to have a falling edge (see “Timing Diagrams” on page 6).
Digital Output (RxD)
The digital output RxD is a push-pull output stage with a driver power of IRxD = 1 mA.
Interference Voltages
and Load Dump (Defined
in DIN40839 or ISO7637)
The U6812B is protected against interference pulses (usually present in the wiring) by
the recommended R1C1 circuitry and the integrated elements (28-V Z-diodes, both at
the supply pin and at the output pins and two diodes connected to VCC and GND at the
digital inputs). All transient pulses, which appear on the supply line (VBatt), should not
affect the function of the IC (see Table 1).
Table 1. Transient Test Conditions
Name
DIN/ISO 1
DIN/ISO 2
DIN/ISO 3a
DIN/ISO 3b
DIN/ISO 5
Voltage
-110 V
110 V
-160 V
150 V
55 V (total)
Source Resistance
10 W
10 W
50 W
50 W
2W
Rise Time
100 V/µs
100 V/µs
30 V/ns
20 V/ns
10 V/ms
Pulse Duration
2 ms
0.05 ms
0.1 µs
0.1 µs
500 ms
Pulse Amount
15000
15000
1 h (reference to ISO)
1 h (reference to ISO)
20
Table 2. Truth Table
WSI-1
WSI-2
WSI-R
EN
L
L
X
H
H
H
X
X
L
L
X
L
X
X
H
X
X
X
L
X
X
X
X
X
TXD
X
X
X
H
L
X
K
X
X
X
Open
L
H
WSO-1
L
Open
Open
X
L
X
WSO-2
L
Open
Open
X
X
X
WSO-R
X
X
X
Open
L
X
RXD
X
X
X
H
L
H
5
4760A–AUTO–10/03