UJA1079TW Просмотр технического описания (PDF) - NXP Semiconductors.
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UJA1079TW Datasheet PDF : 45 Pages
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NXP Semiconductors
UJA1079
LIN core system basis chip
Window, Timeout (with optional cyclic wake-up) and Off modes supported (with
automatic re-enable in the event of an interrupt)
16-bit Serial Peripheral Interface (SPI) for configuration, control and diagnosis
Global enable output for controlling safety-critical hardware
Limp home output (LIMP) for activating application-specific ‘limp home’ hardware in
the event of a serious system malfunction
Overtemperature shutdown
Interrupt output pin; interrupts can be individually configured to signal V1 undervoltage,
LIN/local wake-up and cyclic and power-on interrupt events
Bidirectional reset pin with variable power-on reset length to support a variety of
microcontrollers
Software-initiated system reset
2.5 Voltage regulator V1
Scalable voltage regulator for the microcontroller, its peripherals and additional
external transceivers
±2 % accuracy for LIN master application
±3 % accuracy for LIN slave application
3.3 V and 5 V versions available
Delivers up to 250 mA and can be combined with an external PNP transistor for better
heat distribution over the PCB
Selectable current threshold at which the external PNP transistor starts to deliver
current
Undervoltage warning at 90 % of nominal output voltage and undervoltage reset at
90 % or 70 % of nominal output voltage
Can operate at VBAT voltages down to 4.5 V (e.g. during cranking), in accordance with
ISO7637 pulse 4/4b and ISO16750-2
Stable output under all conditions
3. Ordering information
Table 1. Ordering information
Type number[1]
Package
Name
UJA1079TW/5V0/WD HTSSOP32
UJA1079TW/3V3/WD
UJA1079TW/5V0
UJA1079TW/3V3
Description
plastic thermal enhanced thin shrink small outline package;
32 leads; body width 6.1 mm; lead pitch 0.65 mm; exposed die
pad
Version
SOT549-1
[1] UJA1079TW/5V0xx versions contain a 5 V regulator (V1); UJA1079TW/3V3xx versions contain a 3.3 V regulator (V1); WD versions
contain a watchdog.
UJA1079_2
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 27 May 2010
© NXP B.V. 2010. All rights reserved.
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