UPD168101MA-6A5-E1 Просмотр технического описания (PDF) - NEC => Renesas Technology
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UPD168101MA-6A5-E1 Datasheet PDF : 16 Pages
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µPD168101
Figure 1. Switching time condition
(1) IN2 = Low-level
100%
90%
VIN1
10%
tON
tr
90%
OUT1A→OUT1B
IM
tOFF
tf
90%
Hi-Z
10%
10%
Hi-Z
(2) IN2 = High-level
VIN1
10%
tOFF
tf
OUT1B→OUT1A
90%
IM
10%
100%
90%
brake
tON
tr
OUT1B→OUT1A
90%
10%
FUNCTION TABLE
The logic of each channel is as follows
Channel 1
IN1
IN2
OUT1A
OUT1B
L
L
Z
Z
L
H
L
H
H
L
H
L
H
H
L
L
Channel 2
IN3
IN4
OUT2A
L
L
Z
L
H
L
H
L
H
H
H
L
Channel 3
IN5
IN6
OUT3A
OUT3B
L
L
Z
Z
L
H
L
H
H
L
H
L
H
H
L
L
Channel 4
IN7
IN8
OUT4A
L
L
Z
L
H
L
H
L
H
H
H
L
H: High-level, L: Low-level, Z: High impedance
When all control pin is low-level, IC becomes stand-by state and current consumption is reduced.
OUT2B
Z
H
L
L
OUT4B
Z
H
L
L
4
Data Sheet S14846EJ1V0DS
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