UPD784218 Просмотр технического описания (PDF) - NEC => Renesas Technology

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Компоненты Описание

производитель

UPD784218

16-/8-BIT SINGLE-CHIP MICROCONTROLLERS

NEC => Renesas Technology 

µPD784218, 784218Y

5. BLOCK DIAGRAM

INTP2/NMI

INTP0, INTP1,

INTP3 to INTP6

TI00

TI01

TO0

TI1

TO1

TI2

TO2

TI5/TO5

TI6/TO6

TI7/TO7

TI8/TO8

Programmable

interrupt

controller

Timer/event

counter

(16 bits)

Timer/event

counter 1

(8 bits)

Timer/event

counter 2

(8 bits)

Timer/event

counter 5

(8 bits)

Timer/event

counter 6

(8 bits)

Timer/event

counter 7

(8 bits)

Timer/event

counter 8

(8 bits)

Watch timer

RTP0 to RTP7

NMI/INTP2

ANO0

ANO1

AVREF1

AVSS

ANI0 to ANI7

AVREF0

AVDD

AVSS

P03

PCL

BUZ

Watchdog timer

Real-time

output port

D/A

converter

A/D

converter

Clock output

control

Buzzer output

78K/IV

CPU core

ROM

RAM

UART/IOE1

Baud-rate

generator

UART/IOE2

Baud-rate

generator

Clocked

serial

interface

Bus I/F

Port 0

Port 1

Port 2

Port 3

Port 4

Port 5

Port 6

Port 7

Port 8

Port 9

Port 10

Port 12

Port 13

System control

RxD1/SI1

TxD1/SO1

ASCK1/SCK1

RxD2/SI2

TxD2/SO2

ASCK2/SCK2

SI0/SDA0Note

SO0

SCK0/SCL0Note

AD0 to AD7

A0 to A7

A8 to A15

A16 to A19

RD

WR

WAIT

ASTB

EXA

P00 to P06

P10 to P17

P20 to P27

P30 to P37

P40 to P47

P50 to P57

P60 to P67

P70 to P72

P80 to P87

P90 to P95

P100 to P103

P120 to P127

P130,P131

RESET

X1

X2

XT1

XT2

VDD

VSS

TEST

Note SDA0 and SCL0 are incorporated only in the µPD784218Y and support the I2C bus interface.

Remark The internal ROM capacity varies depending on the product.

Data Sheet U12304EJ2V0DS00

13

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