WM8731 / WM8731L
Production Data
ELECTRICAL CHARACTERISTICS – WM8731L
Test Conditions
AVDD, HPVDD, DBVDD = 1.8V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, TA = +25oC, Slave Mode, fs = 48kHz, XTI/MCLK =
256fs unless otherwise stated.
PARAMETER
SYMBOL
TEST
MIN
TYP
MAX
UNIT
CONDITIONS
Digital Logic Levels (CMOS Levels)
Input LOW level
VIL
0.3 x DBVDD
V
Input HIGH level
VIH
0.7 x DBVDD
V
Output LOW
VOL
0.10 x
V
DBVDD
Output HIGH
VOH
0.9 x DBVDD
V
Power On Reset Threshold (DCVDD)
DCVDD Threshold On -> Off
Vth
0.9
V
Hysteresis
VIH
0.3
V
DCVDD Threshold Off -> On
VOL
0.6
V
Analogue Reference Levels
Reference voltage (VMID)
Potential divider resistance
VVMID
RVMID
AVDD/2
V
50k
Ω
Line Input to ADC
Input Signal Level (0dB)
VINLINE
1.0
AVDD/3.3
Vrms
Signal to Noise Ratio
SNR
A-weighted, 0dB gain
75
85
dB
(Note 1,3)
@ fs = 48kHz
A-weighted, 0dB gain
85
@ fs = 96kHz
Dynamic Range (Note 3)
DR
A-weighted, -60dB full
80
88
dB
scale input
Total Harmonic Distortion
THD
-1dB input, 0dB gain
-76
-60
dB
Power Supply Rejection Ratio
PSRR
1kHz, 100mVpp
50
dB
20Hz to 20kHz,
45
100mVpp
ADC channel separation
1kHz input
90
dB
Programmable Gain
1kHz input
-34.5
0
Rsource < 50Ω
+12
dB
Programmable Gain Step Size
Guaranteed Monotonic
1.5
dB
Mute attenuation
0dB, 1kHz input
80
dB
Input Resistance
RINLINE
0dB gain
20k
30k
Ω
12dB gain
10k
15k
Input Capacitance
CINLINE
10
pF
w
PD Rev 4.3 August 2006
11