WM8736EDS Просмотр технического описания (PDF) - Wolfson Microelectronics plc
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WM8736EDS Datasheet PDF : 17 Pages
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Production Data
WM8736
The master gain register M8 (A[3:0] = 0110) is used to write a gain value to all channels
simultaneously. Bit 8 (LDM) controls the update in the same way as the attenuation registers, and is
to be set to 1 for correct operation in this mode.
LEFT AND RIGHT DAC SOFT MUTE CONTROL
Soft mute is controlled by setting bit MU, register M2:bit 0. A high level on MU (MU = 1) will cause
the output to be muted, the effect of which is to ramp the signal down in the digital domain so that
there is no discernible click. This can be seen in Figure 6 Mute Circuit Operation.
DE-EMPHASIS CONTROL
Bit 1 (DE) in register M2 is used to control digital de-emphasis. A low level on bit 1 (DE = 0) disables
de-emphasis whilst a high level enables de-emphasis (DE = 1). De-emphasis applied to the filters
shapes the frequency response of the digital filter according to the input sample frequency.
LEFT AND RIGHT DAC OPERATION CONTROL
Bit 2 (OPE) in register M2 is used for operation control. With OPE = 0 (default) the device functions
normally. With OPE = 1 the device is disabled and the outputs are held at midrail. Current
consumption of the digital section is minimized, but analogue sections remain active in order to
preserve d.c. levels.
INPUT AUDIO WORD RESOLUTION
WM8736 allows maximum flexibility over the control of the audio data interface, allowing selection of
format type, word length, and sample rates. Bits 3 and 4 of register M2 (IW[1:0]) are used to
determine the input word resolution. WM8736 supports 16-bit, 18-bit, 20-bit and 24-bit formats as
described in Table 10.
BIT 4 (IW1)
BIT 3 (IW0)
0
0
0
1
1
0
1
1
Table 10 Input Data Resolution
INPUT RESOLUTION
16-bit data word
20-bit data word
24-bit data word
18-bit data word
DAC OUTPUT CONTROL
Bits 5, 6, 7 and 8 (PL[3:0]) of register M2 are used to control the output format as shown in Table 11.
PL3
PL2
PL1
PL0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
Table 11 Programmable Output Format
LEFT OUTPUT
MUTE
L
R
(L + R)/2
MUTE
L
R
(L + R)/2
MUTE
L
R
(L + R)/2
MUTE
L
R
(L + R)/2
RIGHT OUTPUT
MUTE
MUTE
MUTE
MUTE
L
L
L
L
R
R
R
R
(L + R)/2
(L + R)/2
(L + R)/2
(L + R)/2
NOTE
Mute both channels
Reverse channels
Stereo mode
Mono mode
WOLFSON MICROELECTRONICS LTD
PD Rev 2.1 January 2001
13
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