WM8608 Просмотр технического описания (PDF) - Wolfson Microelectronics plc

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WM8608

5 to 7.1 Channel PWM Controller

Wolfson Microelectronics plc 

WM8608

AUDIO INTERFACE TIMING – MASTER MODE

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BCLK

(Output)

LRCLK

(Output)

DINFRONT

DINSRND

DINC_LFE

DINREAR

tDL

tDST

tDHT

Figure 2 Digital Audio Data Timing – Master Mode (see Control Interface)

Test Conditions

AVDD, DVDD, BVDD = 3.3V, AGND, DGND, BGDN = 0V, TA = +25oC, Slave Mode, fs = 48kHz, MCLK = 256fs, 24-bit data,

unless otherwise stated.

PARAMETER

SYMBOL

MIN

TYP

MAX

UNIT

Audio Data Input Timing Information

LRCLK propagation delay from BCLK falling edge

tDL

DINFRONT, DINSRND, DINC_LFE and DINREAR setup time

tDST

10

to BCLK rising edge

10

ns

ns

DINFRONT, DINSRND, DINC_LFE and DINREAR hold time

tDHT

10

ns

from BCLK rising edge

Table 4 Audio Interface Timing – Master Mode

w

PP Rev 1.5 March 2004

10

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