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74HC161 Просмотр технического описания (PDF) - NXP Semiconductors.

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74HC161 Datasheet PDF : 18 Pages
First Prev 11 12 13 14 15 16 17 18
Nexperia
74HC161
Presettable synchronous 4-bit binary counter; asynchronous reset
VI 90 %
tW
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
RT
VCC
RL S1
CL
open
001aad983
Test data is given in Table 9.
Test circuit definitions:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistance.
S1 = Test selection switch
Fig. 14. Test circuit for measuring switching times
Table 9. Test data
Input
VI
VCC
tr, tf
6 ns
Load
CL
15 pF, 50 pF
RL
1 kΩ
S1 position
tPHL, tPLH
open
74HC161
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 4 October 2018
© Nexperia B.V. 2018. All rights reserved
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