AD5761R(RevA) Просмотр технического описания (PDF) - Analog Devices
Номер в каталоге
Компоненты Описание
производитель
AD5761R
(Rev.:RevA)
(Rev.:RevA)
Analog Devices
AD5761R Datasheet PDF : 35 Pages
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Data Sheet
1.0
±3V SPAN
0.8
±5V SPAN
±10V SPAN
–2.5V TO +7.5V SPAN
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
VVDSSD
=
=
+21V
–11V
0
10000
20000
30000 40000
DAC CODE
50000
60000
Figure 13. AD5761R DNL Error vs. DAC Code, Bipolar Output
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
0
±3V SPAN
±5V SPAN
±10V SPAN
–2.5V TO +7.5V SPAN
VVDSSD
=
=
+21V
–11V
500 1000 1500 2000 2500 3000 3500 4000
DAC CODE
Figure 14. AD5721R DNL Error vs. DAC Code, Bipolar Output
1.5
+5V U1 INT MAX INL
+5V U1 INT MIN INL
+5V U2 EXT MAX INL +5V U2 EXT MIN INL
1.0
±10V U1 INT MAX INL
±10V U2 EXT MAX INL
±10V U1 INT MIN INL
±10V U2 EXT MIN INL
0.5
0
–0.5
–1.0
–1.5
VVDSSD
=
=
+21V
–11V
–40
–20
0
25
50
85
TEMPERATURE (°C)
105
125
Figure 15. INL Error vs. Temperature
AD5761R/AD5721R
1.0
0.8
VVDSSD
=
=
+21V
–11V
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
+5V U2 EXT MAX DNL
+5V U2 EXT MIN DNL
–0.8
±10V U2 EXT MAX DNL
+5V U1 INT MAX DNL
±10V U2 EXT MIN DNL
+5V U1 INT MIN DNL
±10V U1 INT MAX DNL
±10V U1 INT MIN DNL
–1.0
–40
–20
0
25
50
85
105
125
TEMPERATURE (°C)
Figure 16. DNL Error vs. Temperature
2.0 +5V U2 EXT MAX INL
+5V U1 INT MAX INL
1.5
±10V U2 EXT MAX INL
±10V U1 NT MAX INL
+5V U2 EXT MIN INL
1.0
+5V U1 INT MIN INL
±10V U2 EXT MIN INL
±10V U1 INT MIN INL
0.5
TVVADSSD===25–+°12C11VV
NO LOAD
0
–0.5
–1.0
–1.5
–2.0
+5V SPAN VDD/VSS = +6V/–1V
±10V SPAN VDD/VSS = +11V/–11V
VDD/VSS = +10V/–1V
VDD/VSS = +13.5V/–13.5V
VDD/VSS = +16.5V/–1V
VDD/VSS = +16.5V/–16.5V
VDD/VSS = +7.5V/–1V
VDD/VSS = +12.5V/–12.5V
VDD/VSS = +12.5V/–1V
VDD/VSS = +14.5V/–14.5V
SUPPLY VOLTAGE (V)
Figure 17. INL Error vs. Supply Voltage
1.0 +5V U2 EXT MAX DNL
+5V U1 INT MAX DNL
0.8 ±10V U2 EXT MAX DNL
±10V U1 NT MAX DNL
0.6
+5V U2 EXT MIN DNL
+5V U1 INT MIN DNL
±10V U2 EXT MIN DNL
0.4 ±10V U1 INT MIN DNL
TVVADSSD===25–+°12C11VV
NO LOAD
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
+5V SPAN VDD/VSS = +6V/–1V
±10V SPAN VDD/VSS = +11V/–11V
VDD/VSS = +10V/–1V
VDD/VSS = +13.5V/–13.5V
VDD/VSS = +16.5V/–1V
VDD/VSS = +16.5V/–16.5V
VDD/VSS = +7.5V/–1V
VDD/VSS = +12.5V/–12.5V
VDD/VSS = +12.5V/–1V
VDD/VSS = +14.5V/–14.5V
SUPPLY VOLTAGE (V)
Figure 18. DNL Error vs. Supply Voltage
Rev. A | Page 13 of 35
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