Pin Assignments and Reset States
Signal Name
Table 6. MCF5301x Signal Information and Muxing (continued)
GPIO
Alternate 1
Alternate 2
MCF53010
MCF53011
MCF53012
MCF53013
MCF53014
MCF53015
MCF53016
MCF53017
SD_CAS
SD_CKE
SD_CLK
SD_CLK
SD_CS0
SD_DQS[1:0]
SD_RAS
SD_SDR_DQS
SD_WE
IRQ1DEBUG[7:4]
IRQ1DEBUG[3:0]
IRQ1FEC7
IRQ1FEC6
IRQ1FEC5
IRQ1FEC4
IRQ1FEC[3:2]
IRQ1FEC[1:0]
IRQ07
IRQ06
IRQ04
IRQ01
SDHC_DAT3
SDHC_DAT[2:0]
SDHC_CMD
SDHC_CLK
—
—
—
—
O SDVDD
—
—
—
—
O SDVDD
—
—
—
—
O SDVDD
—
—
—
—
O SDVDD
—
—
—
—
O SDVDD
—
—
—
—
O SDVDD
—
—
—
—
O SDVDD
—
—
—
—
I SDVDD
—
—
—
—
O SDVDD
External Interrupts Port 14,5
PIRQ1DEBUG
[7:4]
PIRQ1DEBUG
[3:0]
PIRQ1FEC7
PIRQ1FEC6
PIRQ1FEC5
PIRQ1FEC4
PIRQ1FEC[3:2]
PIRQ1FEC[1:0]
DDATA[3:0]
—
—
PST[3:0]
—
—
RMII1_CRS_DV
MII0_CRS
—
RMII1_RXER
MII0_RXCLK
—
RMII1_TXEN
MII0_TXCLK
—
RMII1_REF_CLK
—
D
RMII1_RXD[1:0] MII0_RXD[3:2] —
RMII1_TXD[1:0] MII0_TXD[3:2] —
External Interrupts Port 05
I EVDD
I EVDD
I EVDD
I EVDD
I EVDD
I EVDD
I EVDD
I EVDD
PIRQ07
PIRQ06
PIRQ04
PIRQ01
—
—
DREQ0
DREQ1
—
USB_CLKIN
—
—
U
I EVDD
U
I EVDD
U
I EVDD
U
I EVDD
Enhanced Secure Digital Host Controller
PSDHC5
—
PSDHC[4:2]
—
PSDHC1
—
PSDHC0
—
—
UD I/O EVDD
—
U
I/O EVDD
—
U
I/O EVDD
—
—
O EVDD
208 LQFP
154
151
190
191
155
196, 167
152
207
150
—
—
29
30
31
32
33, 34
35, 36
10
—
19
11
60
61–63
59
58
256 MAPBGA
D15
B15
A7
A6
A15
C12, A5
C15
D5
D14
H1, H4-2
K14, H14, K15, J13
J1
J2
K4
J3
J4, K1
K2, L1
E4
L13
D1
F4
N4
R5, N6, N5
R4
R3
MCF5301x Data Sheet, Rev. 5
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
11