HCNW4506-020E Просмотр технического описания (PDF) - Avago Technologies

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Компоненты Описание

производитель

HCNW4506-020E

Intelligent Power Module and Gate Drive Interface Optocouplers

Avago Technologies 

18

+5 V

ILED1

310 Ω

CMOS

+5 V

ILED2

310 Ω

CMOS

HCPL-4506

1

2

20 kΩ

8

0.1 µF

7

3

6

4

5

SHIELD

HCPL-4506

1

2

20 kΩ

8

0.1 µF

7

3

6

4

5

SHIELD

VCC1

20 kΩ

VOUT1

VCC2

20 kΩ

VOUT2

HCPL-4506

HCPL-4506

HCPL-4506

HCPL-4506

HCPL-4506

Figure 24. Typical Application Circuit.

IPM

Q1

Q2

+HV

M

-HV

ILED1

VOUT1

VOUT2

Q1 ON

Q2 OFF

Q1 OFF

Q2 ON

ILED2

tPLH MAX.

tPHL

MIN.

PDD* MAX. =

(tPLH-tPHL) MAX. = tPLH MAX. - tPHL MIN.

*PDD = PROPAGATION DELAY DIFFERENCE

NOTE: THE PROPAGATION DELAYS USED TO CALCULATE

PDD ARE TAKEN AT EQUAL TEMPERATURES.

Figure 25. Minimum LED Skew for Zero Dead Time.

ILED1

VOUT1

VOUT2

Q1 ON

Q2 OFF

Q1 OFF

Q2 ON

ILED2

tPLH

MIN.

tPLH

MAX.

PDD*

MAX.

tPHL

MIN.

tPHL

MAX.

MAX.

DEAD TIME

MAXIMUM DEAD TIME (DUE TO OPTOCOUPLER)

= (tPLH MAX. - tPLH MIN.) + (tPHL MAX. - tPHL MIN.)

= (tPLH MAX. - tPHL MIN.) - (tPLH MIN. - tPHL MAX.)

= PDD* MAX. - PDD* MIN.

*PDD = PROPAGATION DELAY DIFFERENCE

NOTE: THE PROPAGATION DELAYS USED TO CALCULATE THE MAXIMUM

DEAD TIME ARE TAKEN AT EQUAL TEMPERATURES.

Figure 26. Waveforms for Dead Time Calculation.

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