ISL6251EVAL2Z Просмотр технического описания (PDF) - Intersil

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ISL6251EVAL2Z

Low Cost Multi Chemistry Battery Charger Controller

Intersil 

ISL6251, ISL6251A

Current loop gain Ti(S) is expressed as the following

equation:

Ti(S) = 0.25 RTF2(S)M

where RT is the trans-resistance in current loop. RT is

usually equal to the product of the charging current sensing

resistance and the gain of the current sense amplifier, CA2.

For ISL6251, ISL6251A, RT = 20R1.

The voltage gain with open current loop is:

Tv(S) = KM F1(S)AV(S)

Where

K

= VFB

Vo

, VFB is the

feedback voltage of the voltage

error amplifier. The Voltage loop gain with current loop

closed is given by:

Lv

(S

)

=

Tv (S)

1 + Ti (S)

If Ti(S)>>1, then it can be simplified as follows:

LV(S)

=

-4---V-----F---B--

VO

(---R-----O-----+------R----L----)--

RT

--1-----+------ω---------Se------s-------r

1 + ω--S---P--

AV

(S),

ωP

≈

--------1---------

ROCO

From the above equation, it is shown that the system is a

single order system, which has a single pole located at ωp

before the half switching frequency. Therefore, simple type II

compensator can be easily used to stabilize the system.

iˆin

iˆL L

vˆ o

vˆ in

+

ILdˆ 1:D Vindˆ

RT

Rc

Ro

VCA2

Co

Ti(S)

dˆ

K

11/Vin

0.25VCA2

+

-

Tv(S)

vˆcomp -Av(S)

FIGURE 14. SMALL SIGNAL MODEL OF SYNCHRONOUS

BUCK REGULATOR

Figure 15 shows the voltage loop compensator, and its

transfer function is expressed as follows:

Av

(S)

=

vˆ comp

vˆ FB

1+ S

= gm

ω cz

SC1

where

ω cz

=

1

R1C1

Vo

VFB -

VREF

gm

+

VCOMP

R1

C1

FIGURE 15. VOLTAGE LOOP COMPENSATOR

Compensator design goal:

• High DC gain

•

Loop bandwidth fc:

⎜⎛ 1

⎝5

−

1

20

⎟⎞

⎠

fs

• Gain margin: >10dB

• Phase margin: 40°

The compensator design procedure is as follows:

1. Put compensator zero at:

ωcz

=

(1 − 3) 1

RoCo

2. Put one compensator pole at zero frequency to achieve

high DC gain, and put another compensator pole at either

ESR zero frequency or half switching frequency,

whichever is lower.

The loop gain Tv(S) at cross over frequency of fc has unity

gain. Therefore, the compensator resistance R1 is

determined by:

R1

=

8----π----f--C----V----O-----C-----O----R-----T-

gmVFB

where gm is the trans-conductance of the voltage loop error

amplifier. Compensator capacitor C1 is then given by:

C1

=

1

R1 ωcz

Example: Vin = 19V, Vo = 16.8V, Io = 2.6A, fs = 300kHz,

Co = 10μF/10mΩ, L = 10μH, gm = 250μs, RT = 0.8Ω,

VFB = 2.1V, fc = 20kHz, then compensator resistance

R1 = 10kΩ. Choose R1 = 10kΩ. Put the compensator zero at

1.5kHz. The compensator capacitor is C1 = 6.5nF.

Therefore, choose voltage loop compensator: R1 = 10k,

C1 = 6.5nF.

17

FN9202.2

May 10, 2006

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