MK10FX1M0ACMC5 Просмотр технического описания (PDF) - Freescale Semiconductor

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производитель

MK10FX1M0ACMC5

K10 Sub-Family

Freescale Semiconductor 

Peripheral operating requirements and behaviors

Figure 3. TRACE_CLKOUT specifications

TRACE_CLKOUT

TRACE_D[3:0]

Ts

Th

Ts

Th

Figure 4. Trace data specifications

6.1.2 JTAG electricals

Table 13. JTAG limited voltage range electricals

Symbol

J1

Description

Operating voltage

TCLK frequency of operation

• Boundary Scan

• JTAG and CJTAG

• Serial Wire Debug

Min.

2.7

0

0

0

Max.

3.6

10

25

50

J2

TCLK cycle period

J3

TCLK clock pulse width

• Boundary Scan

• JTAG and CJTAG

• Serial Wire Debug

1/J1

—

50

—

20

—

10

—

J4

TCLK rise and fall times

J5

Boundary scan input data setup time to TCLK rise

J6

Boundary scan input data hold time after TCLK rise

J7

TCLK low to boundary scan output data valid

J8

TCLK low to boundary scan output high-Z

J9

TMS, TDI input data setup time to TCLK rise

J10

TMS, TDI input data hold time after TCLK rise

J11

TCLK low to TDO data valid

J12

TCLK low to TDO high-Z

—

3

20

—

0

—

—

25

—

25

8

—

1

—

—

17

—

17

Table continues on the next page...

Unit

V

MHz

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

K10 Sub-Family Data Sheet, Rev. 3, 6/2013.

24

Freescale Semiconductor, Inc.

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