MAX8952 Просмотр технического описания (PDF) - Maxim Integrated

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MAX8952

2.5A Step-Down Regulator with Remote Sense in 2mm x 2mm WLP

Maxim Integrated 

MAX8952

2.5A Step-Down Regulator

with Remote Sense in 2mm x 2mm WLP

A

B

OUT

C

D

E

SDA

S

SLAVE ID

ASr

REG PTR

ASr

DATA

A

P

VID0

VID1

VDD

A: I2C START COMMAND.

B: I2C SLAVE ADDRESS OF MAX8952 SEND OUT.

C: MAX8952 I2C REGISTER POINTER SEND OUT.

D: MAX8952 DATA SEND OUT.

E: MAX8952 ISSUES ACKNOWLEDGE AND CHANGES THE OUTPUT VOLTAGE ACCORDING TO NEW I2C SETTINGS.

Figure 13. Update Output Operation

output voltage/operation mode is updated at the same

time the IC sends the acknowledge for the I2C data

byte (see Figure 13).

Slave Address

A bus master initiates communication with a slave

device (MAX8952) by issuing a START condition fol-

lowed by the slave address. The slave address byte

consists of 7 address bits (1100 000x) and a read/write

bit (R/W). After receiving the proper address, the IC

issues an acknowledge by pulling SDA low during the

ninth clock cycle.

Other slave addresses can be assigned. Contact the

factory for details.

Write Operations

The IC recognizes the write byte protocol as defined in

the SMBus™ specification and shown in Figures 14a and

14b. The write byte protocol allows the I2C master device

to send 1 byte of data to the slave device. The write byte

protocol requires a register pointer address for the sub-

sequent write. The IC acknowledges any register pointer

even though only a subset of those registers actually

exists in the device. The write byte protocol is as follows:

1) The master sends a START command.

2) The master sends the 7-bit slave address followed

by a write bit.

3) The addressed slave asserts an acknowledge by

pulling SDA low.

4) The master sends an 8-bit register pointer.

5) The slave acknowledges the register pointer.

6) The master sends a data byte.

7) The slave acknowledges the data byte.

8) The slave updates with the new data.

9) The master sends a STOP condition.

In addition to the write-byte protocol, the IC can write to

multiple registers as shown in Figure 14b. This protocol

allows the I2C master device to address the slave only

once and then send data to a sequential block of regis-

ters starting at the specified register pointer.

Use the following procedure to write to a sequential

block of registers:

1) The master sends a START command.

2) The master sends the 7-bit slave address followed

by a write bit.

3) The addressed slave asserts an acknowledge by

pulling SDA low.

4) The master sends the 8-bit register pointer of the

first register to write.

5) The slave acknowledges the register pointer.

6) The master sends a data byte.

7) The slave acknowledges the data byte.

8) The slave updates with the new data.

9) Steps 6 to 8 are repeated for as many registers in

the block, with the register pointer automatically

incremented each time.

10) The master sends a STOP condition.

Read Operations

The method for reading a single register (byte) is

shown in Figure 15a. To read a single register:

SMBus is a trademark of Intel Corp.

18

Maxim Integrated

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