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MAX5170AEEE Просмотр технического описания (PDF) - Maxim Integrated

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MAX5170AEEE Datasheet PDF : 16 Pages
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Low-Power, Serial, 14-Bit DACs
with Voltage Output
Typical Operating Characteristics (continued)
(MAX5170: VDD = +5V, VREF = 2.5V; MAX5172: VDD = +3V, VREF = 1.25V; CL = 100pF, OS = GND, code = 3FFF hex,
TA = +25°C, unless otherwise noted.)
MAX5172
REFERENCE INPUT FREQUENCY RESPONSE
5
0
-5
-10
-15
-20
VREF = 0.67Vp-p + 0.75VDC
-25
-30
0
500 1000 1500 2000 2500 3000
FREQUENCY (kHz)
START-UP GLITCH
VDD
1V/div
VOUT
10mV/div
AC-COUPLED
50ms/div
Pin Description
PIN NAME
FUNCTION
1
OS
Offset Adjustment. Connect to AGND for no offset.
2
OUT
Voltage Output. High impedance when in shutdown. The output voltage is limited to VDD.
3
RS
Reset Mode Select (digital input). Connect to VDD to select midscale reset output voltage. Connect to
DGND to select 0 reset output voltage.
4
PDL
Power-Down Lockout (digital input). Connect to VDD to allow shutdown. Connect to DGND to disable
software and hardware shutdown.
5
CLR
Clear DAC (digital input). Clears the DAC to either zero or midscale as determined by RS.
6
CS
Chip Select Input (digital input). DIN ignored when CS is high.
7
DIN
Serial-Data Input (digital input). Data is clocked in on the rising edge of SCLK.
8
SCLK Serial Clock Input (digital input)
9
DGND Digital Ground
10
DOUT Serial-Data Output
11
UPO User-Programmable Output. State is set by the serial input.
12
SHDN
Shutdown (digital input). Pulling SHDN high when PDL = VDD places the chip in shutdown with a maximum
shutdown current of 10µA.
13
AGND Analog Ground
14
REF
Reference Input. Maximum VREF is VDD - 1.4V.
15
N.C.
No Connection
16
VDD
Positive Supply. Bypass to AGND with a 4.7µF capacitor in parallel with a 0.1µF capacitor.
_______________________________________________________________________________________ 9

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