FDMF6824C Просмотр технического описания (PDF) - Fairchild Semiconductor

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FDMF6824C

Extra-Small, High-Performance, High-Frequency DrMOS Module

Fairchild Semiconductor 

Absolute Maximum Ratings

Stresses exceeding the Absolute Maximum Ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.

The absolute maximum ratings are stress ratings only.

Symbol

Parameter

Min. Max. Unit

VCIN

VDRV

VDISB#

VPWM

VSMOD#

VGL

VTHWN#

VIN

VBOOT

Supply Voltage

Drive Voltage

Output Disable

PWM Signal Input

Skip Mode Input

Low Gate Manufacturing Test Pin

Thermal Warning Flag

Power Input

Bootstrap Supply

Referenced to CGND

Referenced to CGND

Referenced to CGND

Referenced to CGND

Referenced to CGND

Referenced to CGND

Referenced to CGND

Referenced to PGND, CGND

Referenced to VSWH, PHASE

Referenced to CGND

-0.3

6.0

V

-0.3

6.0

V

-0.3

6.0

V

-0.3

6.0

V

-0.3

6.0

V

-0.3

6.0

V

-0.3

6.0

V

-0.3 25.0

V

-0.3

6.0

V

-0.3 25.0

V

Referenced to VSWH, PHASE

VGH

High Gate Manufacturing Test Pin

Referenced to CGND

-0.3

6.0

V

-0.3 25.0

V

VPHS PHASE

Referenced to CGND

-0.3 25.0

V

VSWH Switch Node Input

Referenced to PGND, CGND (DC Only) -0.3 25.0

V

Referenced to PGND, <20 ns

-8.0 28.0

V

VBOOT Bootstrap Supply

Referenced to VDRV

Referenced to VDRV, <20 ns

22.0

V

25.0

V

ITHWN# THWN# Sink Current

-0.1

7.0

mA

IO(AV) Output Current(1)

fSW=300 kHz, VIN=12 V, VO=1.0 V

fSW=1 MHz, VIN=12 V, VO=1.0 V

50

A

45

θJPCB Junction-to-PCB Thermal Resistance

2.7 °C/W

TA Ambient Temperature Range

-40 +125 °C

TJ Maximum Junction Temperature

+150 °C

TSTG Storage Temperature Range

-55 +150 °C

Human Body Model, JESD22-A114

2000

ESD Electrostatic Discharge Protection

V

Charged Device Model, JESD22-C101 2500

Note:

1. IO(AV) is rated using Fairchild’s DrMOS evaluation board, at TA = 25°C, with natural convection cooling. This rating

is limited by the peak DrMOS temperature, TJ = 150°C, and varies depending on operating conditions and PCB

layout. This rating can be changed with different application settings.

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to Absolute Maximum Ratings.

Symbol

Parameter

Min. Typ. Max. Unit

VCIN Control Circuit Supply Voltage

4.5

5.0

5.5

V

VDRV

VIN

Gate Drive Circuit Supply Voltage

Output Stage Supply Voltage

4.5

5.0

5.5

V

3.0

12.0 16.0(2)

V

Note:

2. Operating at high VIN can create excessive AC overshoots on the VSWH-to-GND and BOOT-to-GND nodes

during MOSFET switching transients. For reliable DrMOS operation, VSWH-to-GND and BOOT-to-GND must

remain at or below the Absolute Maximum Ratings shown in the table above. Refer to the “Application

Information” and “PCB Layout Guidelines” sections of this datasheet for additional information.

© 2013 Fairchild Semiconductor Corporation

FDMF6824C • Rev. 1.0.1

www.fairchildsemi.com

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