STN1110 Просмотр технического описания (PDF) - Unspecified
Номер в каталоге
Компоненты Описание
производитель
STN1110 Datasheet PDF : 22 Pages
| |||
STN1110
5.0 Guidelines for Getting Started with STN1110
5.1 Basic Connection
Requirements
Getting started with the STN1110 IC requires
attention to a minimal set of device pin connections
before proceeding with development. The following is
a list of pin names, which must always be connected:
• VDD and both VSS pins (see Section 5.2
“Decoupling Capacitors”)
• AVDD and AVSS pins (see Section 5.2
“Decoupling Capacitors” and Section 5.3 “AVDD
and AVSS Pins”)
• VCAP (see Section 5.4 “Internal Voltage
Regulator Filter Capacitor”)
• R¯E¯¯S¯E¯T pin (see Section 5.5 “Device Reset Pin”)
• OSC1 and OSC2 pins (see Section 5.6
“Oscillator Pins”)
• ¯R¯S¯T¯_¯N¯V¯M¯ pin (see Section 5.7 “NVM Reset
Input”)
• Open Drain Output Pull-ups (see Section 5.8
“Open Drain Outputs”)
5.2 Decoupling Capacitors
The use of decoupling capacitors on every pair of
power supply pins, such as VDD, VSS and AVDD,
AVSS is required. Consider the following criteria when
using decoupling capacitors:
• Value and type of capacitor: Recommendation
of 1 μF, 10-20V. This capacitor should be a low-
ESR and have resonance frequency in the range
of 20 MHz and higher. It is recommended that
ceramic capacitors be used.
• Placement on the printed circuit board: The
decoupling capacitors should be placed as close
to the pins as possible. It is recommended to
place the capacitors on the same side of the
board as the device. If space is constricted, the
capacitor can be placed on another layer on the
PCB using a via; however, ensure that the trace
length from the pin to the capacitor is within ¼”
(6 mm) in length.
• Handling high frequency noise: If the board is
experiencing high frequency noise, upward of
tens of MHz, add a second ceramic-type
capacitor in parallel to the above described
decoupling capacitor. The value of the second
capacitor can be in the range of 0.01 µF to
0.001 µF. Place this second capacitor next to the
primary decoupling capacitor.
• Maximizing performance: On the board layout
from the power supply circuit, run the power and
return traces to the decoupling capacitors first,
and then to the device pins. This ensures that the
decoupling capacitors are first in the power chain.
Equally important is to keep the trace length
between the capacitor and the power pins to a
minimum thereby reducing PCB track inductance.
5.2.1 Tank Capacitors
On boards with power traces running longer than six
inches in length, it is suggested to use a tank
capacitor for integrated circuits, including STN1110,
to supply a local power source. The value of the tank
capacitor should be determined based on the trace
resistance that connects the power supply source to
the device, and the maximum current drawn by the
device in the application. In other words, select the
tank capacitor so that it meets the acceptable voltage
sag at the device. Typical values range from 4.7 µF
to 47 µF.
5.3 AVDD and AVSS Pins
As a minimum, AVDD must be connected directly to
VDD and AVSS must be connected to directly VSS.
It is recommended that AVDD be connected to to VDD
via a 10 Ω resistor or a small (10 μH – 47 μH)
inductor.
AVSS should be connected to the electrically cleanest
ground net (plane). For best results, analog circuitry
should have a separate ground plane with a point
connection to VSS ground plane as close as possible
to the AVSS pin.
5.4 Internal Voltage Regulator
Filter Capacitor
A low-ESR (< 5 Ω) capacitor is required on the VCAP
pin, which is used to stabilize the internal voltage
regulator output voltage. The VCAP pin must not be
connected to VDD, and must have a capacitor
between 4.7 µF and 10 µF, 16V connected to ground.
The type can be ceramic or tantalum. Refer to
Section 7.2 “Electrical Characteristics” for
additional information. The placement of this
capacitor should be close to the VCAP pin. It is
recommended that the trace length not exceed ¼”
(6 mm).
8 of 22
www.obdsol.com
STN1110DSA
Share Link: 