NXP Semiconductors
LPC1311/13/42/43
32-bit ARM Cortex-M3 microcontroller
• On the LPC1311/13/42/43, all GPIO pins (except PIO0_4 and PIO0_5) are pulled up
to 2.6 V (VDD = 3.3 V) if their pull-up resistor is enabled in the IOCONFIG block.
• On the LPC1311/01 and LPC1313/01, all GPIO pins (except PIO0_4 and PIO0_5) are
pulled up to 3.3 V (VDD = 3.3 V) if their pull-up resistor is enabled in the IOCONFIG
block.
7.9 USB interface (LPC1342/43 only)
The Universal Serial Bus (USB) is a 4-wire bus that supports communication between a
host and one or more (up to 127) peripherals. The host controller allocates the USB
bandwidth to attached devices through a token-based protocol. The bus supports
hot-plugging and dynamic configuration of the devices. All transactions are initiated by the
host controller.
The LPC1342/43 USB interface is a device controller with on-chip PHY for device
functions.
7.9.1 Full-speed USB device controller
The device controller enables 12 Mbit/s data exchange with a USB Host controller. It
consists of a register interface, serial interface engine, and endpoint buffer memory. The
serial interface engine decodes the USB data stream and writes data to the appropriate
endpoint buffer. The status of a completed USB transfer or error condition is indicated via
status registers. An interrupt is also generated if enabled.
7.9.1.1 Features
• Dedicated USB PLL available.
• Fully compliant with USB 2.0 specification (full speed).
• Supports 10 physical (5 logical) endpoints with up to 64 bytes buffer RAM per
endpoint (see Table 5).
• Supports Control, Bulk, Isochronous, and Interrupt endpoints.
• Supports SoftConnect feature.
• Double buffer implementation for Bulk and Isochronous endpoints.
Table 5. USB device endpoint configuration
Logical Physical Endpoint type
endpoint endpoint
Direction
0
0
Control
out
0
1
Control
in
1
2
Interrupt/Bulk
out
1
3
Interrupt/Bulk
in
2
4
Interrupt/Bulk
out
2
5
Interrupt/Bulk
in
3
6
Interrupt/Bulk
out
3
7
Interrupt/Bulk
in
4
8
Isochronous
out
4
9
Isochronous
in
Packet size
(byte)
64
64
64
64
64
64
64
64
512
512
Double buffer
no
no
no
no
no
no
yes
yes
yes
yes
LPC1311_13_42_43
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 6 June 2012
© NXP B.V. 2012. All rights reserved.
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