Functional Overview
1.2 Pin-out Descriptions
Table 2: Pin-out 8 Pin
Name I/O Pin
Description
P0[7] I/O
1 Port 0[7] (Analog Input)
P0[5] I/O
2 Port 0[5] (Analog Input/Output)
P1[1] I/O
3 Port 1[1] / XtalIn / SCLK
Vss Power 4 Ground
P1[0] I/O
5 Port 1[0] / XtalOut / SDATA
P0[2] I/O
6 Port 0[2] (Analog Input/Output)
P0[4] I/O
7 Port 0[4] (Analog Input/Output)
Vcc Power 8 Supply Voltage
P0[7] 1
P0[5]
XtalIn/SCLK/P1[1]
Vss
2
3
4
8
7
6
5
Vcc
P0[4]
P0[2]
P1[0]/XtalOut/SDATA
Figure 2: CY8C25122
Table 3: Pin-out 20 Pin
Name I/O Pin
Description
P0[7] I/O
1 Port 0[7] (Analog Input)
P0[5] I/O
2 Port 0[5] (Analog Input/Output)
P0[3] I/O
3 Port 0[3] (Analog Input/Output)
P0[1] I/O
4 Port 0[1] (Analog Input)
SMP O
5 Switch Mode Pump
P1[7] I/O
6 Port 1[7]
P1[5] I/O
7 Port 1[5]
P1[3] I/O
8 Port 1[3]
P1[1] I/O
9 Port 1[1] / XtalIn / SCLK
Vss Power 10 Ground
P1[0] I/O
11 Port 1[0] / XtalOut / SDATA
P1[2] I/O
12 Port 1[2]
P1[4] I/O
13 Port 1[4]
P1[6] I/O
14 Port 1[6]
XRES I
15 External Reset
P0[0] I/O
16 Port 0[0] (Analog Input)
P0[2] I/O
17 Port 0[2] (Analog Input/Output)
P0[4] I/O
18 Port 0[4] (Analog Input/Output)
P0[6] I/O
19 Port 0[6] (Analog Input)
Vcc Power 20 Supply Voltage
P0[7] 1
P0[5] 2
P0[3] 3
P0[1] 4
SMP 5
P1[7] 6
P1[5]
7
P1[3]
8
XtalIn/SCLK/P1[1]
9
Vss
10
20
Vcc
19 P0[6]
18 P0[4]
17 P0[2]
16 P0[0]
15
XRES
14 P1[6]
13 P1[4]
12 P1[2]
11
P1[0]/XtalOut/SDATA
Figure 3: CY8C26233
September 5, 2002
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
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