CMX882 Просмотр технического описания (PDF) - CML Microcircuits
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CMX882 Datasheet PDF : 70 Pages
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FRS Signalling Processor
CMX882
AC Parameters (cont.)
Notes
Auxiliary ADC (Signal Monitor)
8 Bit ADC Mode
Resolution
Input Range
Conversion time
Input impedance
Resistance
Capacitance
Zero error
(input offset to give ADC output = 0)
Integral Non-linearity
Differential Non-linearity
Source output impedance
41
42
43
42
43
44
Level Threshold Detect Mode
Threshold Resolution
Upper threshold range (VTH)
45
Lower threshold range (VTL)
45
Signal Monitor change to IRQ
46
Signal Monitor change to Receiver-Turn-On 47
Audio Compandor
Attack time
Decay time
0dB point
48
Compression / Expansion ratio
Min.
10%
−20
VTL
VSS(A)
Typ.
8
20.8
10
5
8
4.0
13
100
2:1
Max.
Unit
Bits
90%
VDD
µs
MΩ
pF
+20
mV
2
LSB
4
LSB
1
LSB
3
LSB
24
kΩ
Bits
VDD(A)
V
VTH
V
120
µs
60
µs
ms
ms
mVrms
Notes: 41
42
43
44
45
46
47
48
With clock frequency of 18.432MHz.
VDD(A) ≥ 3.0V
VDD(A) < 3.0V
Denotes output impedance of the driver of the Signal Monitor input, to ensure < 1
bit additional error under nominal conditions.
Upper threshold > Lower threshold
Time from Signal Monitor input rising above Upper Threshold or falling below
Lower Threshold, to IRQN being asserted.
Time from Signal Monitor input rising above Upper Threshold to receiver path
powering up, settling and starting automatic signal type identification.
VDD(A) = 3.0V
2004 CML Microsystems Plc
63
D/882/7
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