Low-Voltage, High-Accuracy, Quad Voltage
Monitors in µMAX Package
Or, solved in terms of R1:
R1 = R2 ((VINTH / 0.62V) - 1)
VINTH
R1
R2
VREF = 0.62V
( ) R1 = R2 0V.I6N2TVH- 1
Figure 7. Setting the Auxiliary Monitor
Unused Inputs
The unused inputs (except the adjustable) are internally
connected to ground through the lower resistors of the
threshold-setting resistor pairs. The adjustable input,
however, must be connected to ground if unused.
Reset Output
The MAX6714 RESET output asserts low when VCC
drops below its specified threshold or MR asserts low
and remains low for the reset timeout period (140ms
min) after VCC exceeds its threshold and MR deasserts
(Figure 8). The output is open drain with a weak (10µA)
internal pullup to VCC. For many applications, no exter-
nal pullup resistor is required to interface with other
logic devices. An external pullup resistor to any voltage
from 0 to 5.5V overdrives the internal pullup if interfac-
ing to different logic supply voltages (Figure 9). Internal
circuitry prevents reverse current flow from the external
pullup voltage to VCC.
Manual Reset Input
Many µP-based products require manual reset capabili-
ty, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. A logic low on MR
asserts RESET low. RESET remains asserted while MR is
low, and during the reset timeout period (140ms min)
after MR returns high. The MR input has an internal 20kΩ
pullup resistor to VCC, so it can be left open if unused.
Drive MR with TTL or CMOS-logic levels, or with open-
drain/collector outputs. Connect a normally open momen-
tary switch from MR to GND to create a manual reset
function; external debounce circuitry is not required. If
MR is driven from long cables or if the device is used in a
noisy environment, connecting a 0.1µF capacitor from
MR to GND provides additional noise immunity.
Reseting the µP from a 2nd Voltage
(MAX6714)
The MAX6714 can be configured to assert a reset from a
second voltage by connecting the power-fail output to
manual reset. As the VPFI_ falls below its threshold, PFO
goes low and asserts the reset output for the reset time-
out period after the manual reset input is deasserted.
(See Typical Operating Circuit.)
Power-Supply Bypassing and Grounding
The MAX6709/MAX6714 operate from a single 2.0V to
5.5V supply. In noisy applications, bypass VCC with a
0.1µF capacitor as close to VCC as possible.
VCC
VTH_
VTH_
RESET
10%
tRD
90%
tRP
Figure 8. RESET Output Timing Diagram
VCC = 3.3V
VCC
RESET
5V
100kΩ
VCC
RESET
MAX6714
GND
GND
Figure 9. Interfacing to Different Logic Supply Voltage
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