HEF4517B_09 Просмотр технического описания (PDF) - NXP Semiconductors.
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HEF4517B_09 Datasheet PDF : 15 Pages
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NXP Semiconductors
HEF4517B
Dual 64-bit static shift register
6. Pinning information
6.1 Pinning
Fig 3. Pin configuration
HEF4517B
1Q16 1
1Q48 2
1PE/OE 3
1CP 4
1Q64 5
1Q32 6
1D 7
VSS 8
16 VDD
15 2Q16
14 2Q48
13 2PE/OE
12 2CP
11 2Q64
10 2Q32
9 2D
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6.2 Pin description
Table 2. Pin description
Symbol
Pin
1Q16, 2Q16
1, 15
1Q48, 2Q48
2, 14
1PE/OE, 2PE/OE
3, 13
1CP, 2CP
4, 12
1Q64, 2Q64
5, 11
1Q32, 2Q32
6, 10
1D, 2D
7, 9
VSS
8
VDD
16
Description
3-state input/output
3-state input/output
parallel input-enable/output-enable input
clock input
3-state input/output
3-state input/output
data input
ground supply voltage
supply voltage
HEF4517B_6
Product data sheet
Rev. 06 — 10 December 2009
© NXP B.V. 2009. All rights reserved.
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