ADM2582EBRWZ Просмотр технического описания (PDF) - Analog Devices
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ADM2582EBRWZ Datasheet PDF : 20 Pages
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ADM2582E/ADM2587E
ADM2582E TIMING SPECIFICATIONS
TA = −40°C to +85°C.
Table 2.
Parameter
DRIVER
Maximum Data Rate
Propagation Delay, Low to High
Propagation Delay, High to Low
Output Skew
Rise Time/Fall Time
Enable Time
Disable Time
RECEIVER
Propagation Delay, Low to High
Propagation Delay, High to Low
Output Skew1
Enable Time
Disable Time
Symbol Min Typ Max Unit Test Conditions
tDPLH
tDPHL
tSKEW
tDR, tDF
tZL, tZH
tLZ, tHZ
16
Mbps
63 100 ns
RL = 54 Ω, CL1 = C L2 = 100 pF, see Figure 25 and Figure 29
64 100 ns
RL = 54 Ω, CL1 = C L2 = 100 pF, see Figure 25 and Figure 29
18
ns
RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 25 and Figure 29
15 ns
RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 25 and Figure 29
120 ns
RL = 110 Ω, CL = 50 pF, see Figure 26 and Figure 31
150 ns
RL = 110 Ω, CL = 50 pF, see Figure 26 and Figure 31
tRPLH
tRPHL
tSKEW
tZL, tZH
tLZ, tHZ
94 110 ns
95 110 ns
1 12 ns
15 ns
15 ns
CL = 15 pF, see Figure 27 and Figure 30
CL = 15 pF, see Figure 27 and Figure 30
CL = 15 pF, see Figure 27 and Figure 30
RL = 1 kΩ, CL = 15 pF, see Figure 28 and Figure 32
RL = 1 kΩ, CL = 15 pF, see Figure 28 and Figure 32
1 Guaranteed by design.
ADM2587E TIMING SPECIFICATIONS
TA = −40°C to +85°C.
Table 3.
Parameter
Symbol Min Typ Max Unit Test Conditions
DRIVER
Maximum Data Rate
500
kbps
Propagation Delay, Low to High tDPLH
Propagation Delay, High to Low tDPHL
250 503 700 ns
250 510 700 ns
RL = 54 Ω, CL1 = C L2 = 100 pF, see Figure 25 and Figure 29
RL = 54 Ω, CL1 = C L2 = 100 pF, see Figure 25 and Figure 29
Output Skew
tSKEW
7
100 ns
RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 25 and Figure 29
Rise Time/Fall Time
tDR, tDF
200
1100 ns
RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 25 and Figure 29
Enable Time
tZL, tZH
2.5 µs
RL = 110 Ω, CL = 50 pF, see Figure 26 and Figure 31
Disable Time
tLZ, tHZ
200 ns
RL = 110 Ω, CL = 50 pF, see Figure 26 and Figure 31
RECEIVER
Propagation Delay, Low to High tRPLH
91 200 ns
CL = 15 pF, see Figure 27 and Figure 30
Propagation Delay, High to Low tRPHL
Output Skew
tSKEW
95 200 ns
4 30 ns
CL = 15 pF, see Figure 27 and Figure 30
CL = 15 pF, see Figure 27 and Figure 30
Enable Time
tZL, tZH
15
ns
RL = 1 kΩ, CL = 15 pF, see Figure 28 and Figure 32
Disable Time
tLZ, tHZ
15
ns
RL = 1 kΩ, CL = 15 pF, see Figure 28 and Figure 32
ADM2582E/ADM2587E PACKAGE CHARACTERISTICS
Table 4.
Parameter
Resistance (Input-to-Output)1
Capacitance (Input-to-Output)1
Input Capacitance2
Symbol Min Typ Max Unit Test Conditions
RI-O
1012
Ω
CI-O
3
pF
f = 1 MHz
CI
4
pF
1 Device considered a 2-terminal device: short together Pin 1 to Pin 10 and short together Pin 11 to Pin 20.
2 Input capacitance is from any input data pin to ground.
Rev. C | Page 4 of 20
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