MC14512BCP Просмотр технического описания (PDF) - ON Semiconductor

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MC14512BCP

8−Channel Data Selector

ON Semiconductor 

13

C

12

B

11

A

X0 1

2

X1

3

X2

4

X3

5

X4

X5 6

7

X6

X7 9

MC14512B

LOGIC DIAGRAM

15

DISABLE

10

INHIBIT

VDD

14

Z

SELECTED

DEVICE

MC14512B

MC14512B

DATA

BUS

IOD

IL

ITL

LOAD

ITL

MC14512B

VSS

1

IN

OUT

IN

2

TRANSMISSION

GATE

1

OUT

2

3−STATE MODE OF OPERATION

Output terminals of several MC14512B 8−Bit Data

Selectors can be connected to a single date bus as shown.

One MC14512B is selected by the 3−state control, and the

remaining devices are disabled into a high−impedance “off”

state. The number of 8−bit data selectors, N, that may be

connected to a bus line is determined from the output drive

current, IOD, 3−state or disable output leakage current, ITL,

and the load current, IL, required to drive the bus line

(including fanout to other device inputs), and can be

calculated by:

N = IOD – IL + 1

ITL

N must be calculated for both high and low logic state of the

bus line.

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