LPC8N04 Просмотр технического описания (PDF) - NXP Semiconductors.

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LPC8N04

32-bit ARM Cortex®-M0+ microcontroller; 32 kB flash and 8 kB SRAM; NFC/RFID ISO 14443 type A interf

NXP Semiconductors. 

NXP Semiconductors

LPC8N04

32-bit ARM Cortex-M0+ microcontroller

6. Block diagram

The internal block diagram of the LPC8N04 is shown in Figure 1. It consists of a Power

Management Unit (PMU), clocks, timers, a digital computation and control cluster (ARM

Cortex-M0+ and memories) and AHB-APB slave modules.

PADS

POWER

PADS

MFIO

(DIGITAL)

I2C-BUS

HIGH

DRIVE

DIGITAL

SWITCH

MATRIX

32 kHz FRO

WAKE-UP

TIMER

8 MHz FRO

CLOCK

SHOP

EXTERNAL

POWER

SWITCH

LDO (1.2 V)

LDO (1.6 V)

INTERNAL

POWER

SWITCHES

POR

8 kB SRAM

I2C-BUS SPI TIMERS WATCHDOG SYSCONFIG

GPIO

32 kB FLASH

4 kB EEPROM

EEPROM

CONTROL

FLASH

CONTROL

PMU

ARM M0+

AHB-APB BRIDGE

TEMPERATURE

SENSOR

NFC/RFID

Fig 1. LPC8N04 block diagram

aaa-015348

LPC8N04

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1.3 — 15 March 2018

© NXP Semiconductors N.V. 2018. All rights reserved.

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