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580G-01ILFT

GLITCH-FREE CLOCK MULITPLEXER

Integrated Device Technology 

ICS580-01

GLITCH-FREE CLOCK MULITPLEXER

CLOCK MULTIPLEXER

Application Example

In the third example, the ICS580-01 is configured to automatically switch clocks when an input stops. The clock that

could stop is connected to INA while the backup clock (always running) is connected to INB. The output NO_INA is

connected to SELB. This means that when the clock on INA stops, NO_INA goes high selecting the clock on INB

which is muxed to the output after three cycles. When the clock on INA restarts, NO_INA immediately goes low,

selecting the clock on INA. The output then switches in the manner described in the first example.

The circuit diagram in Figure 3 shows a typical connection for this example. Note that CLK2 and NO_INB are

unused and are disabled by grounding OE2 and OE4. A 33Ω series termination resistor is used on the clock output

and two decoupling capacitors of 0.01µF are used. All other inputs are left floating and are therefore pulled high by

the on-chip pull-ups.

VDD

0.01µF

Normal Clock

Backup Clock

SELB

OE1

DIV

VDDC

VDDI

INA

CLK1

33Ω

CLK2

INB NO_INA

GND NO_INB

OE4

GND

OE3

OE2

0.01µF

Output Clock

Output Enable

Each output has a dedicated output enable pin. If an output is unused, it should be tri-stated by tying the

appropriate output enable pin to ground.

External Components

The ICS580-01 requires two 0.01µF decoupling capacitors, one between VDDI and GND and one between VDDC

and GND. Series termination resistors of 33Ω can be used on CLK1 and CLK2.

IDT™ / ICS™ GLITCH-FREE CLOCK MULITPLEXER

5

ICS580-01 REV K 092509

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