Functional overview
STM32F302xx/STM32F303xx
Table 8.
Group
3
4
Capacitive sensing GPIOs available on STM32F302xx/STM32F303xx
devices (continued)
Capacitive sensing
signal name
Pin
name
Group
Capacitive sensing
signal name
Pin
name
TSC_G3_IO1
PC5
TSC_G7_IO1
PE2
TSC_G3_IO2
PB0
7
TSC_G3_IO3
PB1
TSC_G7_IO2
PE3
TSC_G7_IO3
PE4
TSC_G3_IO4
PB2
TSC_G4_IO1
PA9
TSC_G7_IO4
TSC_G8_IO1
PE5
PD12
TSC_G4_IO2
PA10
8
TSC_G4_IO3
PA13
TSC_G8_IO2
TSC_G8_IO3
PD13
PD14
TSC_G4_IO4
PA14
TSC_G8_IO4
PD15
Table 9.
No. of capacitive sensing channels available on
STM32F302xx/STM32F303xx devices
Analog I/O group
Number of capacitive sensing channels
STM32F30xVx
STM32F30xRx
STM32F30xCx
G1
3
3
3
G2
3
3
3
G3
3
3
2
G4
3
3
3
G5
3
3
3
G6
3
3
3
G7
3
0
0
G8
3
0
0
Number of capacitive
sensing channels
24
18
17
3.26
3.26.1
3.26.2
Development support
Serial wire JTAG debug port (SWJ-DP)
The ARM SWJ-DP Interface is embedded, and is a combined JTAG and serial wire debug
port that enables either a serial wire debug or a JTAG probe to be connected to the target.
The JTAG TMS and TCK pins are shared respectively with SWDIO and SWCLK and a
specific sequence on the TMS pin is used to switch between JTAG-DP and SW-DP.
Embedded trace macrocell™
The ARM embedded trace macrocell provides a greater visibility of the instruction and data
flow inside the CPU core by streaming compressed data at a very high rate from the
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Doc ID 023353 Rev 5