EPF10K50VBC356-2 Просмотр технического описания (PDF) - Clear Logic
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EPF10K50VBC356-2 Datasheet PDF : 16 Pages
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LIBERATOR CL10K50V
AC Electrical Specifications cont.
EAB Timing Parameters[5]
Symbol
Parameter
Speed: -1
Speed: -2
Speed: -3
Speed: -4
Min Max Min Max Min Max Min Max Unit
tEABDATA1
Delay from Data or Address to EAB for
Combinatorial Input
1.7
2.8
3.4
4.6 ns
tEABDATA2
Delay from Data or Address to EAB for
Registered Input
4.9
3.9
4.8
5.9 ns
tEABWE1
WE Delay to EAB for Combinatorial
Input
0.0
2.5
3.0
3.7 ns
tEABWE2 WE Delay to EAB for Registered Input
4.0
4.1
5.0
6.2 ns
tEABCLK EAB Register Clock Delay
0.4
0.8
1.0
1.2 ns
tEABCO EAB Register Clock-to-output Delay
0.1
0.2
0.3
0.4 ns
tEABBYPASS Bypass Register Delay
0.9
1.1
1.3
1.6 ns
tEABSU EAB Register Setup Time
0.8
1.5
1.8
2.2
ns
tEABH EAB Register Hold Time
0.8
1.6
2.0
2.5
ns
tAA Address Access Delay
5.5
8.2
10.0
12.4 ns
tWP Write Pulse Width
6
4.9
6.0
7.4
ns
tWDSU
Data Setup Time Before Falling Edge
of Write Pulse
0.1
0.8
1.0
1.2
ns
tWDH
Data Hold Time After Falling Edge of
Write Pulse
0.1
0.2
0.3
0.4
ns
tWASU
Address Setup Time Before Rising
Edge of Write Pulse
0.1
0.4
0.5
0.6
ns
tWAH
Address Hold After Falling Edge of
Write Pulse
0.1
0.8
1.0
1.2
ns
tWO Write Enable to Date Output Delay
2.8
4.3
5.3
6.5 ns
tDD Data-in to Date-out Delay
2.8
4.3
5.3
6.5 ns
tEABOUT Data-out Delay
0.5
0.4
0.5
0.6 ns
tEABCH Clock High Time
2.0
4.0
4.0
4.0
ns
tEABCL Clock Low Time
6.0
4.9
6.0
7.4
ns
10KA tbl 10A
Page 12
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