CA5420A
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(RoHS Compliant)
PKG.
DWG. #
CA5420AMZ
5420 AMZ
-55 to +125
8 Ld SOIC
M8.15
NOTES:
1. Add “96” suffix for Tape and Reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see product information page for CA5420A. For more information on MSL please see techbrief TB363.
Pin Configuration
CA5420A
(8 LD SOIC)
TOP VIEW
OFFSET
NULL
1
INV.
INPUT 2
-
NON-INV. 3
+
INPUT
V- 4
8 STROBE
7 V+
6 OUTPUT
5
OFFSET
NULL
Pin is connected to Case.
FN1925 Rev 9.00
February 11, 2015
Page 2 of 9