74LVX573MTCX Просмотр технического описания (PDF) - Fairchild Semiconductor

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74LVX573MTCX

Low Voltage Octal Latch with 3-STATE Outputs

Fairchild Semiconductor 

Functional Description

The LVX573 contains eight D-type latches. When the

enable (LE) input is HIGH, data on the Dn inputs enters the

latches. In this condition the latches are transparent, i.e., a

latch output will change state each time its D input

changes. When LE is LOW the latches store the informa-

tion that was present on the D inputs a setup time preced-

ing the HIGH-to-LOW transition of LE. The 3-STATE

buffers are controlled by the Output Enable (OE) input.

When OE is LOW, the buffers are enabled. When OE is

HIGH the buffers are in the high impedance mode but this

does not interfere with entering new data into the latches.

Logic Diagram

Truth Table

Inputs

Outputs

OE

LE

D

On

L

H

H

H

L

H

L

L

L

L

X

O0

H

X

X

Z

H HIGH Voltage

L LOW Voltage

Z High Impedance

X Immaterial

O0 Previous O0 before HIGH-to-LOW transition of Latch Enable

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

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