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HT48CA0 Просмотр технического описания (PDF) - Holtek Semiconductor

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производитель
HT48CA0
Holtek
Holtek Semiconductor 
HT48CA0 Datasheet PDF : 36 Pages
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HT48CA0
Oscillator configuration
There are two oscillator circuits in the HT48CA0.
System oscillator
Both are designed for system clocks; the RC
oscillator and the Crystal oscillator, which are
determined by mask options. No matter what
oscillator type is selected, the signal provides
the system clock. The HALT mode stops the
system oscillator and ignores the external sig-
nal to conserve power.
If an RC oscillator is used, an external resistor
between OSC1 and VSS in needed and the re-
sistance must range from 51kto 1M. The
system clock, divided by 4, is available on
OSC2, which can be used to synchronize exter-
nal logic. The RC oscillator provides the most
cost effective solution. However, the frequency
of the oscillation may vary with VDD, tempera-
ture and the chip itself due to process vari-
ations. It is, therefore, not suitable for timing
sensitive operations where accurate oscillator
frequency is desired.
If the Crystal oscillator is used, a crystal across
OSC1 and OSC2 is needed to provide the feed-
back and phase shift for the oscillator. No other
external components are needed. Instead of a
crystal, the resonator can also be connected
between OSC1 and OSC2 to get a frequency
reference, but two external capacitors in OSC1
and OSC2 are required.
Watchdog timer – WDT
The clock source of the WDT is implemented by
instruction clock (system clock divided by 4).
The clock source is processed by a frequency
divider and a prescaller to yield various time
out periods.
WDT time out period =
Clock Source
2n
Where n= 8~11 selected by mask option.
This timer is designed to prevent a software
malfunction or sequence jumping to an un-
known location with unpredictable results. The
Watchdog Timer can be disabled by mask op-
tion. If the Watchdog Timer is disabled, all the
executions related to the WDT result in no op-
Watchdog timer
11
23rd July ’98

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