High-Precision ADC
Mixed-Signal Microcontroller
Table 3. System Register Reset Values
REGISTER BIT
REGISTER
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
AP
0
0
0
0
0
0
0
0
APC
0
0
0
0
0
0
0
0
PSF
i
i
0
0
0
0
0
0
IC
0
0
0
0
0
0
0
0
IMR
0
0
0
0
0
0
0
0
SC
1
0
i
i
i
0
0
0
IIR
0
0
0
0
0
0
0
0
CKCN
1
0
0
0
0
0
0
0
WDCN
s
s
0
0
0
s
s
0
A[0..15]
i
i
i
i
i
i
i
i
i
i
i
i
i
i
i
i
PFX
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IP
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SP
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
IV
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
LC[0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
LC[1]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Offs
0
0
0
0
0
0
0
0
DPC
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
GR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
GRL
0
0
0
0
0
0
0
0
BP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
GRS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
GRH
0
0
0
0
0
0
0
0
GRXL
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BP[offs]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DP[0]
DP[1]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Note: Bits marked with an “i” have an indeterminate value upon reset. Bits marked with an “s” have special behavior upon reset.
Refer to the user’s guide supplement for this device for more details.
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