DS32506N Просмотр технического описания (PDF) - Maxim Integrated
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DS32506N Datasheet PDF : 130 Pages
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DS32506/DS32508/DS32512
8.5.1 Configuration and Monitoring.............................................................................................................. 36
8.5.2 Receive Pattern Detection .................................................................................................................. 37
8.5.3 Transmit Pattern Generation............................................................................................................... 39
8.6 LOOPBACKS ..................................................................................................................................40
8.7 GLOBAL RESOURCES ....................................................................................................................40
8.7.1 Clock Rate Adapter (CLAD)................................................................................................................ 40
8.7.2 One-Second Reference Generator ..................................................................................................... 41
8.7.3 General-Purpose I/O Pins................................................................................................................... 42
8.7.4 Performance Monitor Register Update ............................................................................................... 42
8.7.5 Transmit Manual Error Insertion ......................................................................................................... 43
8.8 8-/16-BIT PARALLEL MICROPROCESSOR INTERFACE ......................................................................43
8.8.1 8-Bit and 16-Bit Bus Widths ................................................................................................................ 43
8.8.2 Byte Swap Mode ................................................................................................................................. 43
8.8.3 Read-Write And Data Strobe Modes .................................................................................................. 43
8.8.4 Multiplexed and Nonmultiplexed Operation ........................................................................................ 43
8.8.5 Clear-On-Read And Clear-On-Write Modes ....................................................................................... 44
8.8.6 Global Write Mode .............................................................................................................................. 44
8.9 SPI SERIAL MICROPROCESSOR INTERFACE ...................................................................................44
8.10 INTERRUPT STRUCTURE ................................................................................................................46
8.11 RESET AND POWER-DOWN............................................................................................................47
9. REGISTER MAPS AND DESCRIPTIONS.........................................................................49
9.1 OVERVIEW ....................................................................................................................................49
9.1.1 Status Bits ........................................................................................................................................... 49
9.1.2 Configuration Fields ............................................................................................................................ 49
9.1.3 Counters.............................................................................................................................................. 49
9.2 OVERALL REGISTER MAP ..............................................................................................................50
9.3 GLOBAL REGISTERS......................................................................................................................51
9.4 PORT COMMON REGISTERS ..........................................................................................................62
9.5 LIU REGISTERS ............................................................................................................................70
9.6 B3ZS/HDB3 ENCODER REGISTERS ..............................................................................................79
9.7 B3ZS/HDB3 DECODER REGISTERS ..............................................................................................80
9.8 BERT REGISTERS ........................................................................................................................84
10. JTAG INFORMATION ...................................................................................................91
11. ELECTRICAL CHARACTERISTICS .............................................................................92
12. PIN ASSIGNMENTS....................................................................................................106
13. PACKAGE INFORMATION.........................................................................................127
13.1 484-LEAD BGA (23MM X 23MM) (56-G60038-001) .....................................................................127
14. THERMAL INFORMATION .........................................................................................128
15. ACRONYMS AND ABBREVIATIONS.........................................................................129
16. TRADEMARK ACKNOWLEDGEMENTS....................................................................129
17. DATA SHEET REVISION HISTORY ...........................................................................130
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