EL5225 Просмотр технического описания (PDF) - Renesas Electronics
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EL5225 Datasheet PDF : 12 Pages
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EL5225
The maximum power dissipation actually produced by the IC
is the total quiescent supply current times the total power
supply voltage and plus the power in the IC due to the loads.
PDMAX = VS IS + VS - VOUTi ILOADi
when sourcing, and:
PDMAX = VS IS + VOUTi ILOADi
when sinking.
Where:
• i = 1 to total 10
• VS = Supply voltage
• IS = Quiescent current
• VOUTi = Output voltage of the i channel
• ILOADi = Load current of the i channel
By setting the two PDMAX equations equal to each other, we
can solve for the RLOADs to avoid the device overheat. The
package power dissipation curves provide a convenient way
to see if the device will overheat.
POWER SUPPLY BYPASSING AND PRINTED CIRCUIT
BOARD LAYOUT
Good printed circuit board layout is necessary for optimum
performance. A low impedance and clean analog ground
plane should be used for the EL5225. The traces from the
two ground pins to the ground plane must be very short.
Lead length should be as short as possible and all power
supply pins must be well bypassed. A 0.1µF ceramic
capacitor must be place very close to the VS, VREFH,
VREFL, and CAP pins. A 4.7µF local bypass tantalum
capacitor should be placed to the VS, VREFH, and VREFL
pins.
APPLICATION USING THE EL5225
In the first application drawing, the schematic shows the
interconnect of a pair of EL5225 chips connected to give
10 gamma corrected voltages above the VCOM voltage, and
10 gamma corrected voltages below the VCOM voltage.
FN7356 Rev 0.00
March 11, 2004
Page 10 of 12
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