ISL6446A Просмотр технического описания (PDF) - Renesas Electronics

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ISL6446A

Dual (180°Out-of-Phase) PWM and Linear Controller

Renesas Electronics 

ISL6446A

low rDS(ON), since it is on most of the time. For high duty cycles

(such as 5.0V in to 3.3V out), the opposite may be true.

Feedback Compensation Equations

This section highlights the design consideration for a voltage

mode controller requiring external compensation. To address a

broad range of applications, a type-3 feedback network is

recommended (see Figure 25).

C2

R2 C1

COMP

FB

C3

R1

R3

ISL6446A

VOUT

FIGURE 25. COMPENSATION CONFIGURATION FOR ISL6446A CIRCUIT

Figure 26 highlights the voltage-mode control loop for a

synchronous-rectified buck converter, applicable to the ISL6446A

circuit. The output voltage (VOUT) is regulated to the reference

voltage, VREF. The error amplifier output (COMP pin voltage) is

compared with the oscillator (OSC) modified sawtooth wave to

provide a pulse-width modulated wave with an amplitude of VIN

at the PHASE node. The PWM wave is smoothed by the output

filter (L and C). The output filter capacitor bank’s equivalent

series resistance is represented by the series resistor E.

The modulator transfer function is the small-signal transfer

function of VOUT/VCOMP. This function is dominated by a DC gain,

given by dMAXVIN/VOSC, and shaped by the output filter, with a

double pole break frequency at FLC and a zero at FCE. For the

purpose of this analysis, L and D represent the channel

inductance and its DCR, while C and E represent the total output

capacitance and its equivalent series resistance.

FN8384 Rev 3.00

Aug 27, 2015

Page 17 of 22

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