ISL6446A Просмотр технического описания (PDF) - Renesas Electronics

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ISL6446A

Dual (180°Out-of-Phase) PWM and Linear Controller

Renesas Electronics 

ISL6446A

FP2 = 2------------R--1---3-------C-----3-

(EQ. 23)

Figure 27 shows an asymptotic plot of the DC/DC converter’s gain vs

frequency. The actual Modulator Gain has a high gain peak

dependent on the quality factor (Q) of the output filter, which is not

shown. Using the previously mentioned guidelines should yield a

compensation gain similar to the curve plotted. The open loop error

amplifier gain bounds the compensation gain. Check the

compensation gain at FP2 against the capabilities of the error

amplifier. The closed loop gain, GCL, is constructed on the log-log

graph of Figure 27 by adding the modulator gain, GMOD (in dB), to

the feedback compensation gain, GFB (in dB). This is equivalent to

multiplying the modulator transfer function and the compensation

transfer function and then plotting the resulting gain.

FZ1FZ2 FP1

FP2

MODULATOR GAIN

COMPENSATION GAIN

CLOSED LOOP GAIN

OPEN LOOP E/A GAIN

within 1 inch of the MOSFETs, Q1 and Q2. The circuit traces for the

MOSFETs’ gate and source connections from the ISL6446A must

be sized to handle up to 2A peak current.

VIN

ISL6446A

UGATE

PHASE

LGATE

PGND

Q1

LOUT VOUT

CIN

Q2

COUT

RETURN

FIGURE 28. PRINTED CIRCUIT BOARD POWER AND GROUND

PLANES OR ISLANDS

20 log







-RR----1-2- 

0

LOG

20log d----M---V--A---O-X---S----C-V----I--N-- GFB

GCL

FLC FCE F0

GMOD

FREQUENCY

FIGURE 27. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN

A stable control loop has a gain crossing with close to a

-20dB/decade slope and a phase margin greater than 45°.

Include worst case component variations when determining

phase margin. The mathematical model presented makes a

number of approximations and is generally not accurate at

frequencies approaching or exceeding half the switching

frequency. When designing compensation networks, select

target crossover frequencies in the range of 10% to 30% of the

switching frequency, fSW.

Layout Considerations

As in any high frequency switching converter, layout is very

important. Switching current from one power device to another

can generate voltage transients across the impedances of the

interconnecting bond wires and circuit traces. These

interconnecting impedances should be minimized by using wide,

short, printed circuit traces. The critical components should be

located as close together as possible using ground plane

construction or single point grounding.

Figure 28 on page 19 shows the critical power components of

the converter. To minimize the voltage overshoot, the

interconnecting wires indicated by heavy lines should be part of

ground or power plane in a printed circuit board. The components

shown in Figure 28 should be located as close together as

possible. Please note that the capacitors CIN and COUT each

represent numerous physical capacitors. Locate the ISL6446A

FN8384 Rev 3.00

Aug 27, 2015

CVCC

PGND

RRT CSS

VCC

BOOT

CBOOT CIN

ISL6446A

SS PHASE

RT

VIN

+VIN

SGND PGND

CVIN

SGND

+VIN

Q1 LOUT

VOUT

Q2 COUT

PGND

FIGURE 29. PRINTED CIRCUIT BOARD POWER AND GROUND

PLANES OR ISLANDS

Page 19 of 22

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