NXP Semiconductors
74LVC1G126
Bus buffer/line driver; 3-state
6. Pinning information
6.1 Pinning
74LVC1G126
OE 1
A2
5 VCC
GND 3
4Y
001aaf196
Fig 4. Pin configuration
SOT353-1 and SOT753
74LVC1G126
OE 1
6 VCC
A2
5 n.c.
GND 3
4Y
001aaf197
Transparent top view
Fig 5. Pin configuration SOT886
74LVC1G126
OE 1
A2
6 VCC
5 n.c.
GND 3
4Y
001aaf401
Transparent top view
Fig 6. Pin configuration SOT891
6.2 Pin description
Table 3.
Symbol
OE
A
GND
Y
n.c.
VCC
Pin description
Pin
SOT353-1/SOT753
1
2
3
4
-
5
7. Functional description
SOT886/SOT891
1
2
3
4
5
6
Description
output enable input
data input
ground (0 V)
data output
not connected
supply voltage
Table 4. Function table[1]
Input
OE
A
H
L
H
H
L
X
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
Output
Y
L
H
Z
74LVC1G126_8
Product data sheet
Rev. 08 — 9 April 2009
© NXP B.V. 2009. All rights reserved.
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