MTV10N100E Просмотр технического описания (PDF) - ON Semiconductor
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MTV10N100E Datasheet PDF : 11 Pages
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MTV10N100E
14
560
QT
12
480
10
8
6 Q1
Q2
400
VGS
320
240
4
TJ = 25°C 160
ID = 10 A
2
80
0
Q3
VDS
0
0 10 20 30 40 50 60 70 80 90 100
Qg, TOTAL GATE CHARGE (nC)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
1000
VDD = 480 V
ID = 10 A
VGS = 10 V
TJ = 25°C
100
td(off)
tf
tr
td(on)
10
0
10
1
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
10
IS = 10 A
dlS/dt = 100 A/μs
8 VDD = 25 V
TJ = 25°C
6
10
TJ = 25°C
VGS = 0 V
8
6
4
4
2
2
0
0
2
4
6
8
10
ID, DRAIN CURRENT (AMPS)
Figure 10. Stored Charge
0
0.5
0.58
0.66
0.74
0.82
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 11. Diode Forward Voltage versus Curre
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain−to−source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (TC) of 25°C.
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the
procedures discussed in AN569, “Transient Thermal
Resistance−General Data and Its Use.”
Switching between the off−state and the on−state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded and the
transition time (tr,tf) do not exceed 10 μs. In addition the
total power averaged over a complete switching cycle must
not exceed (TJ(MAX) − TC)/(RθJC).
A Power MOSFET designated E−FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non−linearly with
an increase of peak current in avalanche and peak junction
temperature.
Although many E−FETs can withstand the stress of
drain−to−source avalanche at currents up to rated pulsed
current (IDM), the energy rating is specified at rated
continuous current (ID), in accordance with industry custom.
The energy rating must be derated for temperature as
shown in the accompanying graph (Figure 12). Maximum
energy at currents below rated continuous ID can safely be
assumed to equal the values indicated.
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