LTC1293/LTC1294/LTC1296
APPLICATI S I FOR ATIO
A “Quick Look” Circuit for the LTC1294/6
Users can get a quick look at the function and timing of the
LTC1294/6 by using the following simple circuit (Figure
23). VREF is tied to VCC. DIN is tied high which means VIN
should be applied to the CH7 with respect to COM. A
Unipolar conversion is requested and the data is output
MSB first. CS is driven at 1/64 the clock rate by the CD4520
and DOUT outputs the data. The output data from the DOUT
pin can be viewed on an oscilloscope that is set up to
trigger on the falling edge of CS (Figure 24).
+5V
22µF
VIN
CH0
DVCC
CH1
AVCC
CH2
CLK
CH3
CS
CH4 LTC1294 DOUT
CH5
DIN
CH6
REF+
CH7
REF–
COM
DGND
AGND
V–
f/64
f
CLK
VDD
EN
RESET
Q1
Q4
Q2
Q3
Q3 CD4520 Q2
Q4
Q1
RESET
EN
VSS
CLK
TO
OSCILLOSCOPE
CLOCK IN
1MHz MAX
LTC1293 F23
Figure 23. “Quick Look” Circuit for the LTC1294/6
CLK
CS
DOUT
NULL
BIT
MSB LSB
(B11) (B0)
FILLS
ZEROES
VERTICAL: 5V/DIV
HORIZONTAL: 2µs/DIV
Figure 24. Scope Trace of the
LTC1294/6 “Quick Look” Circuit
Showing A/D Output
101010101010 (AAAHEX)
TYPICAL APPLICATI S
Digitally Linearized Platinum RTD Signal Conditioner
+15V
LT1027
5VOUT
10µF
12k*
12.5k*
500k
400°C TRIM
+15V
+
A1
LT1101
– A=10
1k*
Rplat.
* TRW-IRC MAR-6 RESISTOR – 0.1%
** 1% FILM RESISTOR
Rplat. = 1kΩ AT 0°C – ROSEMOUNT #118MF
+15V
+
A2
LT1006
–
30.1k**
1µF
3.92M**
500k
ZERO°C TRIM
1k
CH0
CH1
CH2
DVCC
AVCC
CLK
CH3
CS
CH4 LTC1294 DOUT
CH5
DIN
CH6
REF+
CH7
REF –
COM
DGND
AGND
V–
22µF
TANTALUM
TO/FROM
68HC11
PROCESSOR
LTC1293 TA03
25