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M38060E2DXXXFP 查看數據表(PDF) - MITSUBISHI ELECTRIC

零件编号
产品描述 (功能)
生产厂家
M38060E2DXXXFP
Mitsubishi
MITSUBISHI ELECTRIC  
M38060E2DXXXFP Datasheet PDF : 57 Pages
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PIN DESCRIPTION
MITSUBISHI MICROCOMPUTERS
3806 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Pin
VCC
VSS
Name
Power source
Function
Function except a port function
• Apply voltage of 3.0 V to 5.5 V to VCC, and 0 V to VSS.
(Extended operating temperature version : 4.0 V to 5.5 V)
(High-speed version : 2.7 V to 5.5 V)
CNVSS
CNVSS
• This pin controls the operation mode of the chip.
• Normally connected to VSS.
• If this pin is connected to VCC, the internal ROM is inhibited and external memory is accessed.
VREF
Analog reference • Reference voltage input pin for A-D and D-A converters
voltage
AVSS
______
RESET
Analog power
source
Reset input
• GND input pin for A-D and D-A converters
• Connect to VSS.
• Reset input pin for active “L”
XIN
XOUT
Clock input
Clock output
• Input and output signals for the internal clock generating circuit.
• Connect a ceramic resonator or quartz-crystal oscillator between the XIN and XOUT pins to set the
oscillation frequency.
• If an external clock is used, connect the clock source to the XIN pin and leave the XOUT pin open.
• The clock is used as the oscillating source of system clock.
P00 – P07
P10 – P17
P20 – P27
P30 – P37
I/O port P0
I/O port P1
I/O port P2
I/O port P3
• 8 bit CMOS I/O port
• I/O direction register allows each pin to be individually programmed as either input or output.
• At reset this port is set to input mode.
• In modes other than single-chip, these pins are used as address, data, and control bus I/O pins.
• CMOS compatible input level
• CMOS 3-state output structure
P40, P41
P42/INT0,
P43/INT1
I/O port P4
• 8-bit CMOS I/O port with the same function as port P0
• CMOS compatible input level
• CMOS 3-state output structure
• External interrupt input pin
P44/RXD,
P45/TXD,
P46/S__C_L_ K_ 1,
P47/SRDY1
• Serial I/O1 I/O pins
P50
P51/INT2
P53/INT4
I/O port P5
• 8-bit CMOS I/O port with the same function as port P0
• CMOS compatible input level
• CMOS 3-state output structure
• External interrupt input pin
P54/CNTR0,
P55/CNTR1
• Timer X and Timer Y I/O pins
P56/DA1,
P57/DA2
• D-A conversion output pins
P60/AN0
P67/AN7
I/O port P6
• 8-bit CMOS I/O port with the same function as
port P0
• CMOS compatible input level
• CMOS 3-state output structure
• A-D conversion input pins
4

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