DS1682 查看數據表（PDF） - Dallas Semiconductor -> Maxim Integrated

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DS1682

Total Elapsed Time Recorder with Alarm

Dallas Semiconductor -> Maxim Integrated 

DS1682

the WDF is set to a 0, the Alarm Trip Point, Configuration register, Total Time Accumulator, Elapsed

Time Counter, and Event Counter can be written to(if user writable), erased or read.

WMDF – Write Memory Disable Flag – When the Write Memory Disable command is written to F0h

twice at memory location 1Fh, the WMDF will be set to a 1 and will not be able to be reset or cleared.

Once the WMDF is set to a 1, the 10 byte User Memory will become read-only. When the WMDF is a 0,

the User Memory will function like normal EEPROM.

AOS – Alarm Output Select – The AOS bit selects the output type for the Alarm# pin. With the AOS bit

set to a 0, the output will be a constant low when Alarm# is active to burn a fuse, interrupt a processor or

send a logic signal to other digital circuitry. With the AOS bit a 1, the output of the Alarm# pin will be

pulled low four times to flash an LED or communicate with an other device at power up, when the

Alarm# pin is pulled low and release or when the alarm becomes active.

RE – Reset Enable – The Reset Enable bit will allow the device to be reset by enabling the Reset

command. The sections of the 1682 that will be reset is then dependent on the value in the Write Disable

Flag. With the WDF set to 0 and the Reset Enable bit set to a 1, the Reset command will clear the

Elapsed Time Counter, Total Time Accumulate, and Event Counter. When the Reset Enable bit is set to a

0, the Reset command will be disabled.

AP – Alarm Polarity – The Alarm Polarity bit is intended to allow the Alarm to become active or enabled

when the Total Time Accumulate register is equal to or greater than the Alarm Trip Point register value

(AP=1), or conversely, to allow the Alarm to become active or enabled when the Total Time Accumulate

register is less than the Alarm Trip Point register value (AP=0). This feature allows the user to have the

Alarm output after the values match (AP=1) or up until the values match (AP=0).

ERO – Event Counter Roll Over – The ERO bit acts like the 17th bit of the Event Counter. When the

Event Counter reaches FFh the first time, the next event will cause the ERO to transition from a 0 to a 1

and the Event Counter will roll over to 00h. Once the ERO is set to a 1, the Event Counter will not roll

over again. The Event Counter will stop counting events when the ERO is set to 1 and the Event Counter

is set to FFh.

WRITE DISABLE/WRITE MEMORY DISABLE

The 1682 has two 8 bit registers designed to prevent parts of the device from being written to or erased.

These registers will always read 0 if read by the user, but the Write Disable Flag (WDF) and Write

Memory Disable Flag (WMDF) in the Configuration register will indicate the ability or inability to write

the memory locations.

Write Memory Disable – This register when written two times consecutively to F0h at memory location

1Fh will disable the ability to write to the 10 Bytes of User memory. It will not affect the Alarm Trip

Point register, Total Time Accumulate register, Configuration register, Event Counter, Write Disable

register, or the Reset command. Once the Write Memory Disable written is written to F0h, it will set the

Write Memory Disable Flag in the Configuration register to a 1 and it can not be reset to 0 to allow

writing to the User memory and the memory is permanently disabled from future writes. The memory

becomes Read-Only.

Write Disable – After being written two times consecutively to AAh at memory location 1Eh, will

disabled writes to the device by setting the Write Disable flag in the Configuration register to a 1,

permanently. The Reset command, if the Reset Enable bit in the Configuration register is set to a 1, and

the User memory, if the Write Memory Disable flag is still set to 0, will be the only areas of the 1682 that

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