MCP23008/MCP23S08
1.6.7
PULL-UP RESISTOR
CONFIGURATION (GPPU)
REGISTER
The GPPU register controls the pull-up resistors for the
port pins. If a bit is set and the corresponding pin is
configured as an input, the corresponding port pin is
internally pulled up with a 100 kΩ resistor.
REGISTER 1-7:
GPPU – GPIO PULL-UP RESISTOR REGISTER (ADDR 0x06)
R/W-0 R/W-0 R/W-0 R/W-0
R/W-0
R/W-0
PU7
PU6
PU5
PU4
PU3
PU2
bit 7
R/W-0
PU1
R/W-0
PU0
bit 0
bit 7-0
PU7:PU0: These bits control the weak pull-up resistors on each pin (when configured as an
input) <7:0>.
1 = Pull-up enabled.
0 = Pull-up disabled.
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
DS21919B-page 14
© 2005 Microchip Technology Inc.