74LVC16374ADGG,118 查看數據表（PDF） - NXP Semiconductors.

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74LVC16374ADGG,118

16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state

NXP Semiconductors. 

NXP Semiconductors

74LVC16374A; 74LVCH16374A

16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state

tW

VI 90 %

negative

pulse

VM

10 %

0V

tf

VI

positive

pulse

tr

90 %

VM

10 %

0V

tW

VM

tr

tf

VM

VI

G

VCC

VO

DUT

VEXT

RL

RT

CL

RL

001aae331

Test data is given in Table 9.

Definitions for test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

VEXT = External voltage for measuring switching times.

Fig 10. Test circuit for measuring switching times

Table 9. Test data

Supply voltage

1.2 V

2.7 V

3.0 V to 3.6 V

Input

VI

VCC

2.7 V

2.7 V

tr, tf

≤ 2.5 ns

≤ 2.5 ns

≤ 2.5 ns

[1] The circuit performs better when RL = 1 kΩ.

Load

CL

50 pF

50 pF

50 pF

RL

500 Ω[1]

500 Ω

500 Ω

VEXT

tPLH, tPHL

open

open

open

tPLZ, tPZL

2 × VCC

2 × VCC

2 × VCC

tPHZ, tPZH

GND

GND

GND

74LVC_LVCH16374A_7

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 07 — 23 March 2010

© NXP B.V. 2010. All rights reserved.

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